LTC4151
4
4151ff
For more information www.linear.com/LTC4151
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
INL Integral Nonlinearity (SENSE
+
– SENSE
–
)
V
IN
(Note 5)
ADIN
l
l
l
±1
±1
±0.5
±3
±3
±2
LSB
LSB
LSB
s
T
Transition Noise (SENSE
+
– SENSE
–
)
V
IN
ADIN
1.2
0.3
22
µV
RMS
mV
RMS
µV
RMS
f
CONV
Conversion Rate (Continuous Mode)
l
6 7.5 9 Hz
t
CONV
Conversion Time (Snapshot Mode) (SENSE
+
– SENSE
–
)
ADIN, V
IN
l
l
53
26
67
33
85
42
ms
ms
R
ADIN
ADIN Pin Input Resistance ADIN = 3V
l
2 10
MW
I
ADIN
ADIN Pin Input Current ADIN = 3V
l
±2 µA
I
2
C Interface
V
ADR(H)
ADR0, ADR1 Input High Threshold
l
2.3 2.65 3.0 V
V
ADR(L)
ADRO, ADRI Input Low Threshold
l
0.2 0.6 0.9 V
I
ADR(IN)
ADRO, ADRI Input Current ADR0, ADR1 = 0V or 3V
ADR0, ADR1 = 0.8V or 2.2V
l
l
±8
±70 µA
µA
V
SDA(OL)
SDA, SDAO, SDAO Output Low Voltage I
SDA
, I
SDAO
, I
SDAO
= 8mA
l
0.15 0.4 V
I
SDA,SCL(IN)
SDA, SDAI, SDAO, SDAO, SCL Input
Current
SDA, SDAI, SDAO, SDAO, SCL = 5V
l
0 ±2 µA
V
SDA,SCL(TH)
SDA, SDAI, SCL Input Threshold
l
1.6 1.8 2 V
V
SDA,SCL(CL)
SDA, SDAI, SCL Clamp Voltage I
SDA
, I
SDAI
, I
SCL
= 3mA
l
5.5 6.1 6.6 V
I
2
C Interface Timing (Note 4)
f
SCL(MAX)
Maximum SCL Clock Frequency 400 kHz
t
LOW
Minimum SCL Low Period 0.65 1.3 µs
t
HIGH
Minimum SCL High Period 50 600 ns
t
BUF(MIN)
Minimum Bus Free Time Between Stop/
Start Condition
0.12 1.3 µs
t
HD,STA(MIN)
Minimum Hold Time After (Repeated) Start
Condition
140 600 ns
t
SU,STA(MIN)
Minimum Repeated Start Condition Set-Up
Time
30 600 ns
t
SU,STO(MIN)
Minimum Stop Condition Set-Up Time 30 600 ns
t
HD,DATI(MIN)
Minimum Data Hold Time Input –100 0 ns
t
HD,DATO(MIN)
Minimum Data Hold Time Output 300 600 900 ns
t
SU,DAT(MIN)
Minimum Data Set-Up Time Input 30 100 ns
t
SP(MAX)
Maximum Suppressed Spike
Pulse Width
50 110 250 ns
t
RST
Stuck-Bus Reset Time SCL or SDA/SDAI Held Low 20 33 ms
C
X
SCL, SDA Input Capacitance 5 10 pF
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Internal clamps limit the SCL, SDA (LTC4151) and SDAI
(LTC4151-1/LTC4151-2) pins to a minimum of 5.5V. Driving these pins to
voltages beyond the clamp may damage the part. The pins can be safely
tied to higher voltages through a resistor that limits the current below
5mA.
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
is from 7V to 80V, unless noted. (Note 3)
Note 3: All currents into pins are positive. All voltages are referenced to
GND, unless otherwise noted.
Note 4: Guaranteed by design and not subject to test.
Note 5: Integral nonlinearity and total unadjusted error of V
IN
are tested
between 7V and 80V.
Note 6: Offset error of V
IN
is defined by extrapolating the straight line
measured between 7V and 80V.
