MAX4885
Complete VGA 1:2 or 2:1 Multiplexer
10 ______________________________________________________________________________________
standard VGA signals. The charge pump can be dis-
abled to eliminate charge-pump noise; however, RGB
switch performance is slightly degraded. Connect QP
to ground for normal operation.
Horizontal/Vertical Sync Multiplexer
1:2 Multiplexer Mode
The MAX4885 provides two modes of operation for the
HSYNC and VSYNC signals. In 1:2 mode (M = 0), the
HSYNC/VSYNC inputs are buffered to provide level shift-
ing and drive capability to meet the VESA specification.
2:1 Multiplexer Mode
In 2:1 mode (M = 1), the HSYNC/VSYNC output buffers
are disabled, and switches pass signals directly. The
HSYNC and VSYNC switches/buffers are identical, and
either input can be used to route HSYNC and
VSYNC signals.
Display Data Channel Multiplexer
The MAX4885 provides two voltage-clamped switches
to route DDC signals (see Table 3). Each switch
clamps signals to a diode drop less than the voltage
applied on V
CL
. Supply +3.3V on V
CL
to provide volt-
age clamping for VESA I
2
C-compatible signals. If volt-
age clamping is not required, connect V
CL
to V+. The
DDCA and DDCB switches are identical, and each
switch can be used to route either DDC signal.
ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electro-
static discharges encountered during handling and
assembly. Additionally, the MAX4885 is protected to
±8kV on RGB, HSYNC, VSYNC, and DDC switches by
the Human Body Model (HBM). For optimum ESD per-
formance, bypass each V+ pin to ground with a 0.1µF
or larger ceramic capacitor.
Human Body Model (HBM)
Several ESD testing standards exist for measuring the
robustness of ESD structures. The ESD protection of
the MAX4885 is characterized with the Human Body
Model. Figure 5 shows the model used to simulate an
ESD event resulting from contact with the human body.
The model consists of a 100pF storage capacitor that is
charged to a high voltage, then discharged through a
1.5kΩ resistor. Figure 6 shows the current waveform
when the storage capacitor is discharged into a low
impedance.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Please contact Maxim for a reliability report document-
ing test setup, methodology, and results.
Applications Information
1:2 Multiplexer for Low-Voltage Graphics
Controllers
The MAX4885 provides the level shifting necessary to
drive two standard VGA ports from a graphics con-
troller as low as +2.2V. In 1:2 mode, internal buffers
drive the HSYNC and VSYNC signals to VGA standard
TTL levels. The DDC multiplexer provides level shifting
by clamping signals to a diode drop less than V
CL
(see
the Typical Operating Circuit). Connect V
CL
to +3.3V
for normal operation, or to V+ to disable voltage clamp-
ing for DDC signals.
EN M SEL FUNCTION
000
1:2 Mode
Buffers Enabled
H0 to H1
V0 to V1
001
1:2 Mode
Buffers Enabled
H0 to H2
V0 to V2
010
2:1 Mode
Buffers Disabled
H0 to H1
V0 to V1
011
2:1 Mode
Buffers Disabled
H0 to H2
V0 to V2
1XX
H_, V_
High Impedance
Table 2. HV Truth Table
X = Don’t Care
EN SEL FUNCTION
00
DDCA0 to DDCA1
DDCB0 to DDCB1
01
DDCA0 to DDCA2
DDCB0 to DDCB2
1X
DDCA_, DDCB_
High Impedance
Table 3. DDC Truth Table
X = Don’t Care
MAX4885
Complete VGA 1:2 or 2:1 Multiplexer
______________________________________________________________________________________ 11
2:1 Multiplexer
In 2:1 mode, HSYNC and VSYNC buffers are disabled,
allowing bidirectional signaling. The DDC multiplexer
provides level shifting by clamping signals to a diode
drop less than V
CL
(see the Typical Operating Circuit).
Connect V
CL
to V+ to disable voltage clamping for
DDC signals.
Power-Supply Decoupling
Bypass each V+ pin and V
CL
to ground with a 0.1µF or
larger ceramic capacitor as close to the device as pos-
sible.
PC Board Layout
High-speed switches such as the MAX4885 require
proper PC board layout for optimum performance.
Ensure that impedance-controlled PC board traces for
high-speed signals are matched in length and as short
as possible. Connect the exposed pad to a solid
ground plane.
Chip Information
PROCESS: BiCMOS
CONNECT EXPOSED PAD TO GND
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
C
s
100pF
R
C
1MΩ
R
D
1500Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 5. Human Body ESD Test Model
I
P
100%
90%
36.8%
t
RL
TIME
t
DL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
r
10%
0
0
AMPERES
Figure 6. HBM Discharge Current Waveform
MAX4885
Complete VGA 1:2 or 2:1 Multiplexer
12 ______________________________________________________________________________________
R1
G1
B1
R2
G2
B2
R0
G0
B0
SEL
H0
V0
M
H1
V1
H2
V2
DDCA0
DDCB0
DDCA1
DDCB1
DDCA2
DDCB2
V
CL
QP
VOLTAGE
CLAMP
RGB
CHARGE
PUMP
*
*
MAX4885
EN
Functional Diagram

MAX4885ETJ+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Video Switch ICs Complete VGA 1:2 or 2:1 MUX
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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