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MAX4885ETJ+T

P1-P3P4-P6P7-P9P10-P12P13-P13
MAX4885
Complete VGA 1:2 or 2:1 Multiplexer
_______________________________________________________________________________________ 7
t
r
< 5ns
t
f
< 5ns
50%
0V
LOGIC
INPUT
R
L
R0, G0, B0
GND
SEL
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
N_ (
R
L
)
R
L
+ R
ON
V
N_
V+
t
OFF
0V
R1, G1, B1
R2, G2, B2
0.9 x V
0UT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
V+
C
L
V+
V
OUT
MAX4885
50%
Timing Circuits/Timing Diagrams
INPUT
OUTPUT
V
OH
t
PHL
t
PLH
t
SKEW
= | t
PLH
- t
PHL
|
t
PD
= MAX (t
PLH
, t
PHL
)
1V
50%
0V
50%
0.9V
50%
50%
0V
R
S
= R
L
= 50Ω
C
L
= 10pF
V
GEN
GND
C
L
V
OUT
V+
V
OUT
IN
OFF
ON
OFF
ΔV
OUT
Q = (ΔV
OUT
)(C
L
)
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
OFF
ON
OFF
IN
V
IL
TO V
IH
V+
R
GEN
SEL
MAX4885
R0, G0, B0
R1, G1, B1
R2, G2, B2
Figure 1. Switching Time
Figure 2. Propagation Delay and Skew Waveforms
Figure 3. Charge Injection
MAX4885
Complete VGA 1:2 or 2:1 Multiplexer
8 _______________________________________________________________________________________
Timing Circuits/Timing Diagrams (continued)
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
+5V
V
OUT
V+
SEL
V
IN
MAX4885
OFF-ISOLATION = 20log ✕
V
OUT
V
IN
ON-LOSS = 20log ✕
V
OUT
V
IN
CROSSTALK = 20log ✕
V
OUT
V
IN
NETWORK
ANALYZER
50Ω
50Ω 50Ω
50Ω
MEAS REF
10nF
0V OR V+
50Ω
GND
R0, G0, B0
R2, G2, B2
R1, G1, B1
Figure 4. On-Loss, Off-Isolation, and Crosstalk
Pin Description
11, 21, 30
12, 20, 29
MAX4885
Complete VGA 1:2 or 2:1 Multiplexer
_______________________________________________________________________________________ 9
Detailed Description
The MAX4885 integrates high-bandwidth analog
switches and level-translating buffers to implement a
complete 1:2 or 2:1 multiplexer for VGA signals. The
device provides switching for RGB, HSYNC, VSYNC,
and DDC signals. A low-noise charge pump with inter-
nal capacitors provides a boosted gate-drive voltage to
improve performance of the RGB switches.
The device provides two modes of operation: 1:2 and
2:1. In 1:2 mode (M = 0), the HSYNC and VSYNC
inputs feature level-shifting buffers to support TTL out-
put logic levels from low-voltage graphics controllers.
These buffered switches may be driven from as little as
+2.0V up to +5.5V. In 2:1 mode (M=1), the output
buffers for the HSYNC and VSYNC signals are dis-
abled. In both modes, RGB signals are routed with the
same high-performance analog switches, and DDC sig-
nals are voltage clamped to a diode drop less than
V
CL
. Voltage clamping provides protection and com-
patibility with DDC signals and low-voltage ASICs. In
keyboard/video/mouse (KVM) applications, V
CL
is nor-
mally set to +5V because low-voltage clamping is not
required, as specified by the VESA standard.
Drive EN logic high to shut down the MAX4885. In shut-
down mode, supply current is reduced to 5µA and all
switches are high impedance, providing high-signal
rejection. The RGB, HSYNC, VSYNC, and DDC switches
are ESD protected to ±8kV by the Human Body Model.
RGB Switches
The MAX4885 provides three SPDT high-bandwidth
switches to route standard VGA R, G, and B signals
(see Table 1). A boosted gate-drive voltage is generat-
ed by an internal charge pump to improve performance
of the RGB switches. The R, G, and B analog switches
are identical, and any of the three switches can be
used to route red, green, or blue video signals. The
RGB switches function with reduced performance with
the charge pump disabled.
Charge Pump
A low-noise charge pump with internal capacitors pro-
vides a doubled voltage for driving the RGB analog
switches. Noise voltage from the charge pump is less
than 50µV
P-P.
The noise level is more than 80dB below
the signal level, making the charge pump suitable for
Pin Description (continued)
EN SEL FUNCTION
00
R0 to R1
G0 to G1
B0 to B1
01
R0 to R2
G0 to G2
B0 to B2
1 X R_, B_, and G_, High Impedance
Table 1. RGB Truth Table
X = Don’t Care
P1-P3P4-P6P7-P9P10-P12P13-P13

MAX4885ETJ+T

Mfr. #:
Buy MAX4885ETJ+T
Manufacturer:
Maxim Integrated
Description:
Video Switch ICs Complete VGA 1:2 or 2:1 MUX
Lifecycle:
New from this manufacturer.
Delivery:
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