Table 14: Identify Device (Continued)
See Note 1 for setting definitions
Word Bit(s) Setting Default Value Description
59 15 F 1b 1 = The BLOCK ERASE EXT command is supported
14 F 1b 1 = The OVERWRITE EXT command is supported
13 F 1b 1 = The CRYPTO SCRAMBLE EXT command is supported
12 F 1b 1 = The sanitize feature set is supported
11 F 1b 1 = The commands allowed during a sanitize operation are
specified by ACS-3
10 F 1b The SANITIZE ANTIFREEZE LOCK EXT command is supported
9 F 0b Reserved
8 V 1b 1 = Multiple sector settings are valid
7–0 V 00010000b xxh = Current setting for number of logical sectors that shall be
transferred per DRQ data block on READ/WRITE MULTIPLE com-
mands
60–61 F FFFFh 0FFFh Total number of user addressable logical sectors for 28-bit com-
mands
62 X 0000h Obsolete
63 15–11 F 00000b Reserved
10 V 0b 1 = Multiword DMA mode 2 is selected
0 = Multiword DMA mode 2 is not selected
9 V 0b 1 = Multiword DMA mode 1 is selected
0 = Multiword DMA mode 1 is not selected
8 V 0b 1 = Multiword DMA mode 0 is selected
0 = Multiword DMA mode 0 is not selected
7–3 F 00000b Reserved
2 F 1b 1 = Multiword DMA mode 2 and below are supported
1 F 1b 1 = Multiword DMA mode 1 and below are supported
0 F 1b 1 = Multiword DMA mode 0 is supported
64 15–2 F 00000000000000b Reserved
1 F 1b PIO mode 4 supported
0 F 1b PIO mode 3 supported
65 F 0078h Minimum Multiword DMA transfer cycle time per word
Cycle time in nanoseconds
66 F 0078h Manufacturer's recommended Multiword DMA transfer cycle
time
Cycle time in nanoseconds
67 F 0078h Minimum PIO transfer cycle time without flow control
Cycle time in nanoseconds
68 F 0078h Minimum PIO transfer cycle time with IORDY flow control
Cycle time in nanoseconds
5100 Series NAND Flash SSD
Device ID
CCMTD-1725822587-10309
5100_series_SSD_disti.pdf - Rev. C 08/17 EN
13
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2016 Micron Technology, Inc. All rights reserved.
Table 14: Identify Device (Continued)
See Note 1 for setting definitions
Word Bit(s) Setting Default Value Description
69 F Additional supported
15 F 0b Reserved for CFA
14 F 1b 1 = Deterministic read after trim is supported
13 F 0b 1 = Long physical sector alignment error reporting control is
supported
12 X 0b Obsolete
11 F 1b 1 = READ BUFFER DMA is supported
10 F 1b 1 = WRITE BUFFER DMA is supported
9 X 0b Obsolete
8 F 1b 1 = DOWNLOAD MICROCODE DMA is supported
7 F 0b Reserved for IEEE-1667
6 F 0b 0 = Optional ATA device 28-bit commands are supported
5 F 1b 1 = Read zero after trim is supported
4 F 0b/1b 1 = Device encrypts all user data
This bit will be 1 for TCG drives, otherwise 0
3 F 0b 1 = Extended number of user addressable sectors is supported
(words 230 – 233)
2 F 0b All write cache is nonvolatile
1–0 00b Reserved
70 F 0000h Reserved
71–74 F 0000h 0000h 0000h
0000h
Reserved for the IDENTIFY PACKET DEVICE command
75 Queue depth
15–5 F 00000000000b Reserved
4–0 F 11111b Maximum queue depth - 1
5100 Series NAND Flash SSD
Device ID
CCMTD-1725822587-10309
5100_series_SSD_disti.pdf - Rev. C 08/17 EN
14
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2016 Micron Technology, Inc. All rights reserved.
Table 14: Identify Device (Continued)
See Note 1 for setting definitions
Word Bit(s) Setting Default Value Description
76 Serial ATA capabilities
15 F 1b 1 = Supports READ LOG DMA EXT as equivalent to READ LOG
EXT
14 F 0b 1 = Supports Device automatic partial to slumber transitions
13 F 0b 1 = Supports host automatic partial to slumber transitions
12 F 1b Native command queuing priority information is supported
11 F 0b Unload while NCQ commands are outstanding is supported
10 F 1b SATA physical event counter log is supported
9 F 0b 1 = Receipt of host-initiated interface power management re-
quests is supported
8 F 1b Native command queuing is supported
7–4 F 0000b Reserved for future Serial ATA signaling speed grades
3 F 1b 1 = Serial ATA Gen-3 speed (6.0 Gb/s) is supported
2 F 1b 1 = Serial ATA Gen-2 speed (3.0 Gb/s) is supported
1 F 1b 1 = Serial ATA Gen-1 speed (1.5 Gb/s) is supported
0 F 0b Reserved (set to 0)
77 Serial ATA additional capabilities
15–7 000000000b Reserved for Serial ATA
6 F 0b 1 = Supports RECEIVE FPDMA QUEUED and SEND FPDMA
QUEUED commands
5 F 0b NCQ QUEUE MANAGEMENT command is supported
4 F 0b NCQ streaming is supported
3–1 V Varies Coded value indicating current negotiated Serial ATA signal
speed
0 F 0b Shall be cleared to zero
78 Serial ATA features are supported
15–8 00000000b Reserved for Serial ATA
7 F 0b 1 = Device supports NCQ autosense
6 F 1b 1 = Supports software settings preservation
5 F 0b 1 = Device supports hardware feature control
4 F 0b 1 = In-order data delivery is supported
3 F 0b 1 = Device-initiated interface power management is supported
2 F 1b 1 = DMA setup auto-activate optimization is supported
1 F 0b 1 = Non-zero buffer offsets in DMA setup FIS are supported
0 F 0b Reserved (set to 0)
5100 Series NAND Flash SSD
Device ID
CCMTD-1725822587-10309
5100_series_SSD_disti.pdf - Rev. C 08/17 EN
15
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2016 Micron Technology, Inc. All rights reserved.

MTFDDAV480TBY-1AR16ABYY

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Manufacturer:
Micron
Description:
Solid State Drives - SSD 5100 480GB M.2 SSD
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