240Pin DDR3L 1600 UDIMM
2GB Based on 256Mx8
AQD-D3L2GN16-SQ
SERIAL PRESENCE DETECT SPECIFICATION
AQD-CD3L2G16N-SQ Serial Presence Detect
Number of SPD Bytes written / SPD device size / CRC
coverage during module production
CRC:0-116Byte
SPD Byte use: 176Byte
SPD Byte total: 256Byte
Key Byte / DRAM Device Type
Fine Timebase Dividend and Divisor
SDRAM Minimum Cycle Time (tCKmin)
CAS Latencies Supported, Least Significant Byte
CAS Latencies Supported, Most Significant Byte
Minimum CAS Latency Time (tAAmin)
Minimum Write Recovery Time (tWRmin)
Minimum /RAS to /CAS Delay Time (tRCDmin)
Minimum Row Active to Row Active Delay Time
(tRRDmin)
Minimum Row Precharge Time (tRPmin)
Upper Nibble for tRAS and tRC
Minmum Active to Precharge Time (tRASmin)
Minmum Active to Active/Refresh Time (tRCmin)
Minmum Refresh Recovery Time (tRFCmin), Least
Significant Byte
Minmum Refresh Recovery Time (tRFCmin), Most
Significant Byte
Minmum Internal Write to Read Command Delay Time
(tWTmin)
Minimum Internal Read to Precharge Command Delay
Time (tRTPmin)
Minmum Four Active Window Delay Time (tFAWmin)
DLL off Mode,
RZQ/6, RZQ/7
SDRAM Thermal and Refresh Options
