L9951 / L9951XP Electrical specifications
Doc ID 14173 Rev 9 15/36
Note: DI timing parameters tested in production by a passed/failed test:
Tj= -40°C/+25°C: SPI communication @2MHZ.
Tj= +125°C: SPI communication @1.25MHZ.
t
r in
Rise time of input signal DI,
CLK, CSN
V
CC
= 5V 100 ns
t
f in
Fall time of input signal DI,
CLK, CSN
V
CC
= 5V 100 ns
1. See Figure 3 and Figure 4
Table 14. DI timing
(1)
(continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
Table 15. DO
Symbol Parameter Test condition Min. Typ. Max. Unit
V
DOL
Output low level VCC = 5 V, I
D
= -4mA 0.2 0.4 V
V
DOH
Output high level VCC = 5 V, I
D
= 4 mA
V
CC
-0.4
V
CC
-0.2
V
I
DOLK
Tristate leakage current
V
CSN
= V
CC
,
0V < V
DO
< V
CC
-10 10 µA
C
DO
(1)
1. Value of input capacity is not measured in production test. Parameter guaranteed by design.
Tristate input capacitance
V
CSN
= V
CC
,
0V < V
CC
< 5.3V
10 15 pF
Table 16. DO timing
(1)
1. See Figure 5 and Figure 6.
Symbol Parameter Test condition Min. Typ. Max. Unit
t
r DO
DO rise time C
L
= 100 pF, I
load
= -1mA 80 140 ns
t
f DO
DO fall time C
L
= 100 pF, I
load
= 1mA 50 100 ns
t
en DO tri L
DO enable time
from tristate to low level
C
L
= 100 pF, I
load
= 1mA
pull-up load to V
CC
100 250 ns
t
dis DO L tri
DO disable time
from low level to tristate
C
L
= 100 pF, I
load
= 4 mA
pull-up load to V
CC
380 450 ns
t
en DO tri H
DO enable time
from tristate to high level
C
L
=100 pF, I
load
= -1mA
pull-down load to GND
100 250 ns
t
dis DO H tri
DO disable time
from high level to tristate
C
L
= 100 pF, I
load
= -4mA
pull-down load to GND
380 450 ns
t
d DO
DO delay time
V
DO
< 0.3 V
CC
, V
DO
> 0.7V
CC
,
C
L
= 100pF
50 250 ns
