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ATF-54143-BLKG

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
ATF-54143
Low Noise Enhancement Mode Pseudomorphic HEMT
in a Surface Mount Plastic Package
Data Sheet
Description
Avago Technologies’ ATF-54143 is a high dynamic range,
low noise, E-PHEMT housed in a 4-lead SC-70 (SOT-343)
surface mount plastic package.
The combination of high gain, high linearity and low
noise makes the ATF-54143 ideal for cellular/PCS base
stations, MMDS, and other systems in the 450 MHz to 6
GHz frequency range.
Features
High linearity performance
Enhancement Mode Technology
[1]
Low noise  gure
Excellent uniformity in product speci cations
800 micron gate width
Low cost surface mount small plastic package SOT-
343 (4 lead SC-70)
Tape-and-Reel packaging option available
Lead-free option available.
Speci cations
2 GHz; 3V, 60 mA (Typ.)
36.2 dBm output 3
rd
order intercept
20.4 dBm output power at 1 dB gain compression
0.5 dB noise  gure
16.6 dB associated gain
Applications
Low noise ampli er for cellular/PCS base stations
LNA for WLAN, WLL/RLL and MMDS applications
General purpose discrete E -PHEMT for other ultra low
noise applications
Note:
1. Enhancement mode technology requires positive Vgs, thereby
eliminating the need for the negative gate voltage associated with
conventional depletion mode devices.
Surface Mount Package SOT-343
Pin Connections and Package Marking
SOURCE
DRAIN
GATE
SOURCE
4Fx
Note:
Top View. Package marking provides orientation and identi cation
“4F” = Device Code
“x” = Date code character
identi es month of manufacture.
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class 1A)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
2
ATF-54143 Absolute Maximum Ratings
[1]
Absolute
Symbol Parameter Units Maximum
V
DS
Drain - Source Voltage
[2]
V 5
V
GS
Gate - Source Voltage
[2]
V -5 to 1
V
GD
Gate Drain Voltage
[2]
V -5 to 1
I
DS
Drain Current
[2]
mA 120
P
diss
Total Power Dissipation
[3]
mW 725
P
in max.
(ON mode) RF Input Power (Vds=3V, Ids=60mA) dBm 20
[5]
P
in max.
(OFF mode) RF Input Power (Vd=0, Ids=0A) dBm 20
I
GS
Gate Source Current mA 2
[5]
T
CH
Channel Temperature °C 150
T
STG
Storage Temperature °C -65 to 150
θ
jc
Thermal Resistance
[4]
°C/W 162
Notes:
1. Operation of this device in excess of any one of these parameters
may cause permanent damage.
2. Assumes DC quiescent conditions.
3. Source lead temperature is 25°C. Derate 6.2 mW/°C for T
L
> 33°C.
4. Thermal resistance measured using 150°C Liquid Crystal Measure-
ment method.
5. The device can handle +20 dBm RF Input Power provided I
GS
is
limited to 2 mA. I
GS
at P
1dB
drive level is bias circuit dependent.
See application section for additional information.
Product Consistency Distribution Charts
[6, 7]
V
DS
(V)
Figure 1. Typical I-V Curves.
(V
GS
= 0.1 V per step)
I
DS
(mA)
0.4V
0.5V
0.6V
0.7V
0.3V
02146537
120
100
80
60
40
20
0
OIP3 (dBm)
Figure 2. OIP3 @ 2 GHz, 3 V, 60 mA.
LSL = 33.0, Nominal = 36.575
30 3432 38 4036 42
160
120
80
40
0
Cpk = 0.77
Stdev = 1.41
-3 Std
GAIN (dB)
Figure 3. Gain @ 2 GHz, 3 V, 60 mA.
USL = 18.5, LSL = 15, Nominal = 16.6
14 1615 1817 19
200
160
120
80
40
0
Cpk = 1.35
Stdev = 0.4
-3 Std
+3 Std
NF (dB)
Figure 4. NF @ 2 GHz, 3 V, 60 mA.
USL = 0.9, Nominal = 0.49
0.25 0.650.45 0.85 1.05
160
120
80
40
0
Cpk = 1.67
Stdev = 0.073
+3 Std
Notes:
6. Distribution data sample size is 450 samples taken from 9 di erent wafers. Future wafers allocated to this product may have nominal values
anywhere between the upper and lower limits.
7. Measurements made on production test board. This circuit represents a trade-o between an optimal noise match and a realizeable match
based on production test equipment. Circuit losses have been de-embedded from actual measurements.
3
ATF-54143 Electrical Speci cations
T
A
= 25°C, RF parameters measured in a test circuit for a typical device
Symbol Parameter and Test Condition Units Min. Typ.
[2]
Max.
Vgs
Operational Gate Voltage Vds = 3V, Ids = 60 mA V 0.4 0.59 0.75
Vth
Threshold Voltage Vds = 3V, Ids = 4 mA V 0.18 0.38 0.52
Idss
Saturated Drain Current Vds = 3V, Vgs = 0V μA — 1 5
Gm
Transconductance Vds = 3V, gm = ΔIdss/ΔVgs; mmho 230 410 560
ΔVgs = 0.75- 0.7 = 0.05V
Igss Gate Leakage Current Vgd = Vgs = -3V μA — — 200
NF Noise Figure
[1]
f = 2 GHz Vds = 3V, Ids = 60 mA dB — 0.5 0.9
f = 900 MHz Vds = 3V, Ids = 60 mA dB — 0.3 —
Ga Associated Gain
[1]
f = 2 GHz Vds = 3V, Ids = 60 mA dB 15 16.6 18.5
f = 900 MHz Vds = 3V, Ids = 60 mA dB — 23.4 —
OIP3
Output 3
rd
Order f = 2 GHz Vds = 3V, Ids = 60 mA dBm 33 36.2 —
Intercept Point
[1]
f = 900 MHz Vds = 3V, Ids = 60 mA dBm — 35.5 —
P1dB
1dB Compressed f = 2 GHz Vds = 3V, Ids = 60 mA dBm — 20.4 —
Output Power
[1]
f = 900 MHz Vds = 3V, Ids = 60 mA dBm — 18.4 —
Notes:
1. Measurements obtained using production test board described in Figure 5.
2. Typical values measured from a sample size of 450 parts from 9 wafers.
Input
50 Ohm
Transmission
Line Including
Gate Bias T
(0.3 dB loss)
Input
Matching Circuit
Γ_mag = 0.30
Γ_ang = 150°
(0.3 dB loss)
Output
Matching Circuit
Γ_mag = 0.035
Γ_ang = -71°
(0.4 dB loss)
DUT
50 Ohm
Transmission
Line Including
Drain Bias T
(0.3 dB loss)
Output
Figure 5. Block diagram of 2 GHz production test board used for Noise Figure, Associated Gain, P1dB, and OIP3 measurements. This circuit represents a
trade-o between an optimal noise match and associated impedance matching circuit losses. Circuit losses have been de-embedded from actual measure-
ments.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

ATF-54143-BLKG

Mfr. #:
Buy ATF-54143-BLKG
Manufacturer:
Broadcom / Avago
Description:
RF JFET Transistors Transistor GaAs Single Voltage
Lifecycle:
New from this manufacturer.
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