AD5535
Rev. A | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
T = 25°C, unless otherwise noted.
A
Table 3
.
Parameter Rating
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
V
PP
to AGND 0.3 V to 250 V
V
to AGND +0.3 V to −6 V
V
+
to AGND −0.3 V to +7 V
AV to AGND, DAC_GND −0.3 V to +7 V
CC
DV to DGND −0.3 V to +7 V
CC
Digital Inputs to DGND −0.3 V to DVCC + 0.3 V
REF_IN to AGND, DAC_GND −0.3 V to AVCC + 0.3 V
Transient currents up to 100 mA do not cause SCR latch-up.
V
OUT
(0 to 31) to AGND V– to V
PP
This device is an integrated high voltage circuit with an ESD
rating of <2 kV, and it is ESD sensitive. Proper precautions
should be taken for handling and assembly.
Anode/Cathode to AGND, DAC_GND −0.3 V to +7 V
AGND to DGND −0.3 V to +0.3 V
Operating Temperature Range
Industrial −10°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature (T
J
max) 150°C
40°C/W
124-Lead CSP_BGA Package,
θ
JA
Thermal Impedance
Lead Temperature Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Reflow Soldering (Pb-free)
Peak Temperature 260(0/−5)°C
Time at Peak Temperature 10 sec to 40 sec
ESD (Human Body Model) 450 V
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
AD5535
Rev. A | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
A
B
C
D
E
F
G
J
H
K
L
M
N
P
10
8
7
6
3
2
1
9
5
4
11 12 13
14
05068-003
10
8
7
6
3
2
1
9
5
4
11 12 13
14
A
B
C
D
E
F
G
J
H
K
L
M
N
P
Figure 3. Pin Configuration
Table 4. 124-Lead CSP-BGA Ball Configuration
CSP_BGA
No.
Ball Name
A1 NC
A2 V
OUT
1
A4 V
OUT
7
A6 V
OUT
11
A8 V
OUT
16
A10 V
OUT
20
A12 V
OUT
25
A14 NC
B1 V
OUT
0
B3 V
OUT
4
B5 V
OUT
9
B7 V
OUT
13
B9 V
OUT
17
B11 V
OUT
21
B13 V
OUT
26
C2 V
OUT
3
C12 V
OUT
22
CSP_BGA
No.
Ball Name
C14 V
OUT
29
D1 V
OUT
2
D13 V
OUT
23
E2 V
OUT
5
E4 V
OUT
8
E6 V
OUT
12
E8 V
OUT
15
E10 V
OUT
19
E12 V
OUT
24
E14 V
OUT
31
F3 V
OUT
6
F5 V
OUT
10
F7 V
OUT
14
F9 V
OUT
18
F13 V
OUT
30
G14 V
OUT
28
H1 V
PP
CSP_BGA
No.
Ball Name
H2 V
PP
H4 to H11 AGND
H13 V
OUT
27
J3 to J12 AGND
K1 V
+
K2 V
+
K3 to K14 AGND
L1 V
L2 V
L3 to L13 AGND
L14 DAC_GND
M1 AGND
M2 AGND
M3 to M12 AGND
M13 AV
CC
M14 AV
CC
N1 PGND
CSP_BGA
No.
Ball Name
N2 PGND
N3 CATHODE
N4 ANODE
N5 to N14 AGND
P1 NC
P2 REF_IN
P3 DAC_GND
P4
RESET
P5 DV
CC
P6 DGND
P7 TEST
P8 D
IN
P9 SCLK
P10
SYNC
P11 to P13 AGND
P14 NC
AD5535
Rev. A | Page 8 of 16
Table 5. Pin Function Descriptions
Mnemonic Description
AGND Analog GND Pins.
AV
CC
Analog Supply Pins. Voltage range from 4.75 V to 5.25 V.
V
PP
Output Amplifier High Voltage Supply. Voltage range from (REF_IN × 50) + 10 V to 225 V.
V
+
V
+
Amplifier Supply Pins. Voltage range from 4.75 V to 5.25 V.
V
V
Amplifier Supply Pins. Voltage range from −4.75 V to −5.25 V.
PGND Output Amplifier Ground Reference Pins.
DGND Digital GND Pins.
DV
CC
Digital Supply Pins. Voltage range from 2.7 V to 5.25 V.
DAC_GND Reference GND Supply for All DACs.
REF_IN
Reference Voltage for Channel 0 to Channel 31. Reference input range is 1 V to 4 V and can be used to program the full-
scale output voltage from 50 V to 200 V.
V
OUT
0 to V
OUT
31 Analog Output Voltages from the 32 Channels.
ANODE Anode of Internal Diode for Diode Temperature Measurement.
CATHODE Cathode of Internal Diode for Diode Temperature Measurement.
SYNC Active Low Input. This is the frame synchronization signal for the serial interface. While SYNC is low, data is transferred in
upon the falling edge of SCLK.
SCLK
1
Serial Clock Input. Data is clocked into the shift register upon the falling edge of SCLK. This operates at clock speeds of up
to 30 MHz.
D
IN
1
Serial Data Input. Data must be valid upon the falling edge of SCLK.
TEST
Allows the same data to be simultaneously loaded to all channels of the AD5535. This pin is used for calibration purposes
when loading zero scale and full scale to all channels. To invoke this feature, bring the TEST pin high. In normal operation,
TEST should be tied low.
RESET
1
Active Low Input. This pin can also be used to reset the complete device to its power-on reset conditions. Zero code is
loaded to the DACs.
NC No connect pins. The user should not connect any signals to these pins.
1
Internal pull-up device on logic input; therefore, it can be left floating and defaults to a logic high condition.

AD5535ABCZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC IC 32-CH w/ 200V AMP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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