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LTC2463CDD#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
LTC2461/LTC2463
4
24613fa
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Notes 2, 7)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
High Level Input Voltage
l
0.7V
CC
V
V
IL
Low Level Input Voltage
l
0.3V
CC
V
I
I
Digital Input Current
l
–10 10 µA
V
HYS
Hysteresis of Schmidt Trigger Inputs (Note 3)
l
0.05V
CC
V
V
OL
Low Level Output Voltage (SDA) I = 3mA
l
0.4 V
I
IN
Input Leakage 0.1V
CC
≤ V
IN
≤ 0.9V
CC
l
1 µA
C
I
Capacitance for Each I/O Pin
l
10 pF
C
B
Capacitance Load for Each Bus Line
l
400 pF
V
IH(A0)
High Level Input Voltage for Address Pin
l
0.95V
CC
V
V
IL(A0)
Low Level Input Voltage for Address Pin
l
0.05V
CC
V
I
2
C INPUTS AND OUTPUTS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Notes 2, 7)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
CONV
Conversion Time
l
13 16.6 23 ms
f
SCL
SCL Clock Frequency
l
0 400 kHz
t
HD(SDA,STA)
Hold Time (Repeated) START Condition
l
0.6
ms
t
LOW
LOW Period of the SCL Pin
l
1.3
ms
t
HIGH
HIGH Period of the SCL Pin
l
0.6
ms
t
SU(STA)
Set-Up Time for a Repeated START Condition
l
0.6
ms
t
HD(DAT)
Data Hold Time
l
0 0.9
ms
t
SU(DAT)
Data Set-Up Time
l
100 ns
t
r
Rise Time for SDA, SCL Signals (Note 6)
l
20 + 0.1C
B
300 ns
t
f
Fall Time for SDA, SCL Signals (Note 6)
l
20 + 0.1C
B
300 ns
t
SU(STO)
Set-Up Time for STOP Condition
l
0.6
ms
t
BUF
Bus Free Time Between a Stop and Start Condition
l
1.3
ms
t
OF
Output Fall Time V
IHMIN
to V
ILMAX
Bus Load C
B
= 10pF to
400pF (Note 6)
l
20 + 0.1C
B
250 ns
t
SP
Input Spike Suppression
l
50 ns
I
2
C TIMING CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND. V
CC
= 2.7V to 5.5V
unless otherwise specified.
Note 3: Guaranteed by design, not subject to test.
Note 4: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
Guaranteed by design and test correlation.
Note 5: Input sampling current is the average input current drawn from
the input sampling network while the LTC2461/LTC2463 are converting.
Note 6: C
B
= capacitance of one bus line in pF.
Note 7: All values refer to V
IH(MIN
) and V
IL(MAX)
levels.
Note 8: A positive current is flowing into the DUT pin.
Note 9: Voltage temperature coefficient is calculated by dividing the
maximum change in output voltage by the specified temperature range.
LTC2461/LTC2463
5
24613fa
TYPICAL PERFORMANCE CHARACTERISTICS
Offset Error vs Temperature
ADC Gain Error vs Temperature
Transition Noise vs Temperature
Conversion Mode Power Supply
Current vs Temperature
Sleep Mode Power Supply
Current vs Temperature
V
REF
vs Temperature
(T
A
= 25°C, unless otherwise noted)
TEMPERATURE (°C)
OFFSET ERROR (LSB)
1
5
24613 G04
–1
0
2
3
4
–2
–3
–4
–5
V
CC
= 5.5V
V
CC
= 4.1V
V
CC
= 2.7V
–50
–10 10–30
50 70
30
90
TEMPERATURE (°C)
–50
ADC GAIN ERROR (LSB)
25
5
24613 G05
0
15
10
20
–25 25 50 750 100
V
CC
= 5.5V
V
CC
= 4.1V
V
CC
= 2.7V
TEMPERATURE (°C)
TRANSITION NOISE RMS (µV)
6
10
24613 G06
4
5
7
8
9
3
2
1
0
–50
–10 10–30
50 70
30
90
V
CC
= 5.5V
V
CC
= 2.7V
–50
–10 10–30
50 70
30
90
V
CC
= 5.5V
V
CC
= 2.7V
TEMPERATURE (°C)
2.0
1.9
24613 G07
1.4
1.5
1.6
1.7
1.8
1.3
1.2
1.1
1.0
V
CC
= 4.1V
–50
–10 10–30
50 70
30
90
V
CC
= 5.5V
V
CC
= 2.7V
V
CC
= 4.1V
TEMPERATURE (°C)
SLEEP CURRENT (nA)
350
24613 G08
150
300
250
200
100
50
0
–50
–10 10–30
50 70
30
90
TEMPERATURE (°C)
REFERENCE OUTPUT VOLTAGE (V)
1.2508
24613 G09
1.2502
1.2503
1.2504
1.2505
1.2506
1.2507
V
CC
= 5V
Integral Nonlinearity (V
CC
= 5.5V)
Integral Nonlinearity (V
CC
= 2.7V)
INL vs Temperature
DIFFERENTIAL INPUT VOLTAGE (V)
–1.25 –0.75 –0.25
INL (LSB)
1
3
24613 G02
–1
0
2
–2
–3
0.25 0.75
1.25
T
A
= –45°C, 25°C, 90°C
TEMPERATURE (°C)
–55
INL (LSB)
1
3
24613 G03
–1
0
2
–2
–3
–35 –15
25 45 65 85
5
125105
V
CC
= 5.5V, 4.1V, 2.7V
DIFFERENTIAL INPUT VOLTAGE (V)
–1.25 –0.75 –0.25
INL (LSB)
1
3
24613 G01
–1
0
2
–2
–3
0.25 0.75
1.25
T
A
= –45°C, 25°C, 90°C
LTC2461/LTC2463
6
24613fa
PIN FUNCTIONS
REFOUT (Pin 1): Reference Output Pin. Nominally 1.25V,
this voltage sets the fullscale input range of the ADC. For
noise and reference stability connect to a 0.1µF capacitor
tied to GND. This capacitor value must be less than or
equal to the capacitor tied to the reference compensation
pin (COMP). REFOUT cannot be overdriven by an external
reference. For applications that require an input range
greater than 0V to 1.25V, please refer to the LTC2451/
LTC2453.
COMP (Pin 2): Internal Reference Compensation Pin. For
low noise and reference stability, tie a 0.1μF capacitor to
GND.
A0 (Pin 3): Chip Address Control Pin. The A0 pin can be
tied to GND or V
CC
. If A0 is tied to GND, the LTC2461/
LTC2463 I
2
C address is 0010100. If A0 is tied to V
CC
, the
LTC2461/LTC2463 I
2
C address is 1010100.
GND (Pins 4, 7, 11): Ground. Connect directly to the
ground plane through a low impedance connection.
SCL (Pin 5): Serial Clock Input of the I
2
C Interface. The
LTC2461/LTC2463 can only act as a slave and the SCL pin
only accepts external serial clock. Data is shifted into the
SDA pin on the rising edges of SCL and output through
the SDA pin on the falling edges of SCL.
SDA (Pin 6): Bidirectional Serial Data Line of the I
2
C Inter-
face. The conversion result is output through the SDA pin.
The pin is high impedance unless the LTC2461/LTC2463
is in the data output mode. While the LTC2461/LTC2463
is in the data output mode, SDA is an open drain pull
down (which requires an external 1.7k pull-up resistor
to V
CC
).
REF
–
(Pin 8): Negative Reference Input to the ADC. The
voltage on this pin sets the zero input to the ADC. This
pin should tie directly to ground or the ground sense of
the input sensor.
IN
+
(LTC2463), IN (LTC2461) (Pin 9): Positive input volt-
age for the LTC2463 differential device. ADC input for the
LTC2461 single-ended device.
IN
–
(LTC2463), GND (LTC2461) (Pin 10): Negative input
voltage for the LTC2463 differential device. GND for the
LTC2461 single-ended device.
V
CC
(Pin 12): Positive Supply Voltage. Bypass to GND with
a 10μF capacitor in parallel with a low-series-inductance
0.1μF capacitor located as close to pin 12 as possible.
Exposed Pad (Pin 13 – DFN Package): Ground. Connect
directly to the ground plane through a low impedance
connection.
TYPICAL PERFORMANCE CHARACTERISTICS
(T
A
= 25°C, unless otherwise noted)
Power Supply Rejection
vs Frequency at V
CC
Conversion Time vs Temperature
FREQUENCY AT V
CC
(Hz)
1
REJECTION (dB)
0
24613 G10
–20
–40
–60
–80
–100
–120
10
1k 10k 100k 1M
100
10M
T
A
= 25°C
V
CC
= 4.1V
TEMPERATURE (°C)
–50
CONVERSION TIME (ms)
21
24613 G11
20
16
17
18
19
15
14
–25
25 50 75
0
100
V
CC
= 5V, 4.1V, 3V
V
REF
vs V
CC
2.0 3.52.5 4.03.0 5.0 5.54.5 6.0
V
CC
(V)
V
REF
(V)
1.24892
1.24891
24613 G12
1.24884
1.24885
1.24886
1.24887
1.24888
1.24889
1.24890
T
A
= 25°C
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LTC2463CDD#PBF

Mfr. #:
Buy LTC2463CDD#PBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 16-Bit I2C 60Hz Differential Delta Sigma ADC with Internal Reference
Lifecycle:
New from this manufacturer.
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