NB4N121KMNG

NB4N121K
http://onsemi.com
7
Figure 9. Typical Termination Configuration for Output Driver and Device Evaluation
C
Lx
for Test Only (Representing Receiver Input Loading); Not Added to Application
CL3
D
2 pF
CL4
D
2 pF
A. For 1X configuration, connect
IREF
pin
to GND or for 2X configuration, connect
IREF
pin to V
CC
. To adjust load drive for
1X configuration, use
RREF
from 0 W to
1 kW, to adjust 2X load, use 20 kW to
50 kW.
B. RL1, RL2: 50 W for 1X Load
25 W for 2X Load
C. RS1, RS2: 0 W for Test and
Evaluation. Select to Minimizing Ringing.
D. CL1, CL2, CL3, CL4: Receiver Input
Simulation Load Capacitance Only
CL1
D
2 pF
CL2
D
2 pF
Z
0
= 50 W
Z
0
= 50 W
2X Load Option
1X Load
Receiver 2
Receiver
R
S1
C
R
S2
C
HCSL
Driver
R
REF
A
R
L1
B
50
R
L2
B
50
Qx
Qx
50 W*
V
TCLK
= V
TCLK
= V
CC
2.0 V
LVPECL
Driver
Z
0
= 50 W
Z
0
= 50 W
V
CC
= 3.3 V V
CC
= 3.3 V
GND GND
50 W*
V
TCLK
V
TCLK
D
D
Figure 10. LVPECL Interface
*RTIN, Internal Input Termination Resistor
50 W*
V
TCLK
= V
TCLK
LVDS
Driver
Z
0
= 50 W
Z
0
= 50 W
V
CC
= 3.3 V V
CC
= 3.3 V
GND GND
50 W*
V
TCLK
V
TCLK
D
D
Figure 11. LVDS Interface
*RTIN, Internal Input Termination Resistor
NB4N121K NB4N121K
NB4N121K
http://onsemi.com
8
50 W*
V
TCLK
= V
TCLK
=
V
CC
CML
Driver
Z
0
= 50 W
Z
0
= 50 W
V
CC
V
CC
GND GND
50 W*
V
TCLK
V
TCLK
D
D
Figure 12. Standard 50 W Load CML
Interface
*RTIN, Internal Input Termination Resistor
NB4N121K
V
CC
50 W*
V
TCLK
= OPEN
LVCMOS/
LVTTL
Driver
Z
0
= 50 W
V
CC
V
CC
GND GND
50 W*
V
TCLK
V
TCLK
D
D
*RTIN, Internal Input Termination Resistor
NB4N121K
Figure 13. LVCMOS/LVTTL Interface
D = V
th
V
th
V
TCLK
= OPEN
VDR
INTQ
VCC
INTQb
Q
Qb
Figure 14. HCSL Output Structure
ORDERING INFORMATION
Device Package Shipping
NB4N121KMNG QFN52
(PbFree)
260 Units / Tray
NB4N121KMNR2G QFN52
(PbFree)
2000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NB4N121K
http://onsemi.com
9
PACKAGE DIMENSIONS
QFN52 8x8, 0.5P
CASE 485M01
ISSUE C
C0.15
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30
MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
D
E
B
C0.08
A1
A3
A
D2
L
NOTE 3
C0.15
2X
2X
SEATING PLANE
C0.10
A2
C
E2
52 X
e
1
13
14 26
27
39
4052
b
52 X
A0.10 BC
0.05 C
DIM MIN MAX
MILLIMETERS
A 0.80 1.00
A1 0.00 0.05
A2 0.60 0.80
A3 0.20 REF
b 0.18 0.30
D 8.00 BSC
D2 6.50 6.80
E 8.00 BSC
E2 6.50 6.80
e 0.50 BSC
K 0.20 ---
REF
K
52 X
L 0.30 0.50
PIN ONE
REFERENCE
SOLDERING FOOTPRINT*
DIMENSIONS: MILLIMETERS
8.30
6.75
6.75
0.50
0.62
0.30
52X
52X
PITCH
8.30
PKG
OUTLINE
RECOMMENDED
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent
rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury
or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an
Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 8002829855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81358171050
NB4N121K/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 3036752175 or 8003443860 Toll Free USA/Canada
Fax: 3036752176 or 8003443867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loca
l
Sales Representative

NB4N121KMNG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Buffer UTL TSMC 1:21 FANOUT HCSL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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