LTC2641/LTC2642
19
26412fd
For more information www.linear.com/LTC2641
APPLICATIONS INFORMATION
on the digital inputs is imperceptible, thanks to the digital
input hysteresis)
Just by maintaining separate areas on the GND plane
where analog and digital return currents naturally flow,
good results are generally achieved. Only after this has
been done, it is sometimes useful to interrupt the ground
plane with strategically placed “slots”, to prevent the digital
ground currents from fringing into the analog portion of
the plane. When doing this, the gap in the plane should
be only as long as it needs to be to serve its purpose.
Caution: if a GND plane gap is improperly placed, so that
it interrupts a significant GND return path, or if a signal
traces crosses over the gap, then adding the gap may
greatly degrade performance! In this case, the GND and
signal return currents are forced to flow the long way
around the gap, and then are typically channeled directly
into the most sensitive area of the analog GND plane.
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
14
85
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(DD8) DFN 0509 REV C
0.25 ±0.05
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
1.65 ±0.05
(2 SIDES)2.10 ±0.05
0.50
BSC
0.70 ±0.05
3.5 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
