ADV7127 Data Sheet
Rev. A | Page 14 of 18
THEORY OF OPERATION
The ADV7127 contains one 10-bit DAC, with one input
channel containing a 10-bit register. A reference amplifier is
also integrated on board the device.
DIGITAL INPUTS
Ten bits of data (color information), D0 to D9, are latched into
the device on the rising edge of each clock cycle. This data is
presented to the 10-bit DAC and is then converted to an analog
output waveform (see Figure 22).
CLOCK
DATA
ANALOG OUTPUTS
I
OUT
, I
OUT
DIGITAL INPUTS
D0 TO D9
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Figure 22. Video Data Input/Output
All of these digital inputs are specified to accept TTL logic levels.
CLOCK INPUT
The CLOCK input of the ADV7127 is typically the pixel clock
rate of the system. It is also known as the dot rate. The dot rate,
and therefore the required CLOCK frequency, is determined by
the onscreen resolution, according to the following equation:
Dot Rate = (Horizontal Resolution × Vertical Resolution ×
Refresh Rate)/Retrace Factor
where:
Horizontal Resolution is the number of pixels per line.
Vertical Resolution is the number of lines per frame.
Refresh Rate is the horizontal scan rate at which the screen must
be refreshed, typically 60 Hz for a noninterlaced system or
30 Hz for an interlaced system.
Retrace Factor is the total blank time factor, which takes into
account that the display is blanked for a certain fraction of the
total duration of each frame (for example, 0.8).
If there is a graphics system with a 1024 × 1024 resolution, a
noninterlaced 60 Hz refresh rate, and a retrace factor of 0.8, then
Dot Rate = (1024 × 1024 × 60)/0.8 = 78.6 MHz
The required CLOCK frequency is 78.6 MHz.
All video data and control inputs are latched into the ADV7127 on
the rising edge of CLOCK, as previously described in the Digital
Inputs section. It is recommended that the CLOCK input to the
ADV7127 be driven by a TTL buffer (for example, 74F244).
I
OUT
mA V
17.61 0.66
0 0
BLACK
LEVEL
WHITE
LEVEL
100 IRE
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Figure 23. I
OUT
RS-343A Video Output Waveform
Table 7. Video Output Truth Table (R
SET
= 560 Ω, R
LOAD
=
37.5 Ω)
Description Data I
OUT
(Ω)
I
OUT
(Ω)
DAC Input
White Level 17.62 0 0x3FF
Video Video 17.62 − Video Data
Black Level 0 17.62 0x000
REFERENCE INPUT
The ADV7127 has an on-board voltage reference. The V
REF
pin
is normally terminated to V
AA
through a 0.1 µF capacitor.
Alternatively, the device can, if required, be overdriven by an
external 1.23 V reference (AD1580).
A resistance R
SET
connected between the R
SET
pin and the GND
pin determines the amplitude of the output video level according to
the following equation:
I
OUT
(mA) = (7968 × V
REF
(V))/R
SET
(Ω)
Using a variable value of R
SET
allows accurate adjustment of the
analog output video levels. Use of a fixed 560 Ω R
SET
resistor
yields the analog output levels quoted in Specifications section.
These values typically correspond to the RS-343A video
waveform values shown in Figure 23.
DIGITAL-TO-ANALOG CONVERTER
The ADV7127 contains a 10-bit DAC. The DAC is designed using
an advanced, high speed, segmented architecture. The bit currents
corresponding to each digital input are routed to either the analog
output (bit = 1) or GND (bit = 0) by a sophisticated decoding
scheme. The use of identical current sources in a monolithic design
guarantees monotonicity and low glitch. The on-board operational
amplifier stabilizes the full-scale output current against temperature
and power supply variations.
