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ADV7127KRU50-REEL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
Data Sheet ADV7127
Rev. A | Page 3 of 18
SPECIFICATIONS
5 V ELECTRICAL CHARACTERISTICS
V
AA
= 5 V ± 5%, V
REF
= 1.235 V, R
SET
= 560 Ω, C
L
= 10 pF. All specifications T
MIN
to T
MAX
,
1
unless otherwise noted. T
J MAX
= 110°C.
Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
STATIC PERFORMANCE
Resolution (Each DAC) 10 Bits
Integral Nonlinearity (INL) –1 +0.4 +1 LSB
Differential Nonlinearity –1 +0.25 +1 LSB Guaranteed monotonic
DIGITAL AND CONTROL INPUTS
Input Voltage
High V
IH
2 V
Low V
IL
0.8 V
PDOWN
Input Voltage
High 3 V
Low
1
V
Input Current
IN
–1
+1
µA
V
IN
= 0.0 V or V
AA
Pull-Up Current
PSAVE
20 µA
PDOWN
20 µA
Input Capacitance C
IN
10 pF
ANALOG OUTPUTS
Output Current 2.0 18.5 mA
Output Compliance Range V
OC
0 1.4 V
Output Impedance R
OUT
100 kΩ
Output Capacitance C
OUT
10 pF I
OUT
= 0 mA
Offset Error –0.025 +0.025 % FSR Tested with DAC output = 0 V
Gain Error
2
–5.0 +5.0 % FSR FSR = 17.62 mA
VOLTAGE REFERENCE (EXTERNAL
AND INTERNAL)
3
Reference Range V
REF
1.12 1.235 1.35 V
POWER DISSIPATION
Supply Current
Digital 1.5 3 mA f
CLK
= 50 MHz
4 6 mA f
CLK
= 140 MHz
6.5 10 mA f
CLK
= 240 MHz
Analog
23
27
mA
R
SET
= 560 Ω
5 mA R
SET
= 4933 Ω
Standby
4
3.8 6 mA
PSAVE
= low, digital and control inputs at V
AA
PDOWN
1 mA
Power Supply Rejection Ratio PSRR 0.1 0.5 %/%
1
Temperature range T
MIN
to T
MAX
: −40°C to +85°C at 50 MHz and 140 MHz, and 0°C to 70°C at 240 MHz.
2
Gain error = ((Measured (FSC)/Ideal (FSC) − 1) × 100), where Ideal = V
REF
/R
SET
× K × (0x3FF) and K = 7.9896.
3
The digital supply is measured with a continuous clock, with data input corresponding to a ramp pattern, and with an input level at 0 V and V
DD
.
4
These typical/maximum specifications are guaranteed by characterization to be over the 4.75 V to 5.25 V range.
ADV7127 Data Sheet
Rev. A | Page 4 of 18
3.3 V ELECTRICAL CHARACTERISTICS
V
AA
= 3.0 V to 3.6 V, V
REF
= 1.235 V, R
SET
= 560 Ω, C
L
= 10 pF. All specifications T
MIN
to T
MAX
,
1
unless otherwise noted. T
J MAX
= 110°C.
Table 2.
Parameter
2
Symbol Min Typ Max Unit Test Conditions/Comments
STATIC PERFORMANCE R
SET
= 680 Ω
Resolution (Each DAC) 10 Bits
Integral Nonlinearity (INL) –1 +0.5 +1 LSB
Differential Nonlinearity –1 +0.25 +1 LSB
DIGITAL AND CONTROL INPUTS
Input Voltage
High V
IH
2.0 V
Low V
IL
0.8 V
PDOWN Input Voltage
High 2.1 V
Low 0.6 V
Input Current I
IN
–1 +1 μA V
IN
= 0.0 V or V
DD
PSAVE Pull-Up Current
20 μA
Input Capacitance C
IN
10 pF
ANALOG OUTPUTS
Output Current 2.0 18.5 mA
Output Compliance Range V
OC
0 1.4 V
Output Impedance R
OUT
70 kΩ
Output Capacitance C
OUT
10 pF
Offset Error 0 0 % FSR Tested with DAC output = 0 V
Gain Error
3
0 % FSR FSR = 17.62 mA
VOLTAGE REFERENCE (EXTERNAL)
Reference Range V
REF
1.12 1.235 1.35 V
VOLTAGE REFERENCE (INTERNAL)
Reference Range V
REF
1.235 V
POWER DISSIPATION
Supply Current
Digital
4
1 2 mA f
CLK
= 50 MHz
2.5 4.5 mA f
CLK
= 140 MHz
4 6 mA f
CLK
= 240 MHz
Analog 22 25 mA R
SET
= 560 Ω
5 mA R
SET
= 4933 Ω
Standby 2.6 3 mA
PSAVE
= low, digital and control inputs at V
DD
PDOWN
20 μA
Power Supply Rejection Ratio PSRR 0.1 0.5 %/%
1
Temperature range T
MIN
to T
MAX
: −40°C to +85°C at 50 MHz and 140 MHz and 0°C to 70°C at 240 MHz.
2
These maximum/minimum specifications are guaranteed by characterization to be over 3.0 V to 3.6 V range.
3
Gain error = ((Measured (FSC)/Ideal (FSC) − 1) × 100), where Ideal = V
REF
/R
SET
× K × (0x3FF) and K = 7.9896.
4
The digital supply is measured with a continuous clock, with data input corresponding to a ramp pattern, and with an input level at 0 V and V
DD
.
Data Sheet ADV7127
Rev. A | Page 5 of 18
5 V TIMING SPECIFICATIONS
V
AA
= 5 V ± 5%,
1
V
REF
= 1.235 V, R
SET
= 560 Ω, C
L
= 10 pF. All specifications T
MIN
to T
MAX
,
2
unless otherwise noted. T
J MAX
= 110°C.
Table 3.
Parameter
3
Symbol Min Typ Max Unit Test Conditions/Comments
ANALOG OUTPUTS
Delay t
6
5.5 ns
Rise/Fall Time
4
t
7
1.0 ns
Transition Time
5
t
8
15 ns
Skew
6
t
9
1 2 ns Not shown in Figure 2
CLOCK CONTROL
7
f
CLK
0.5 50 MHz 50 MHz grade
0.5 140 MHz 140 MHz grade
0.5
240
MHz
240 MHz grade
Data and Control
Setup t
1
1.5 ns
Hold t
2
2.5 ns
Clock Pulse Width
High t
4
1.875 1.1 ns f
MAX
= 240 MHz
2.85 ns f
MAX
= 140 MHz
8.0 ns f
MAX
= 50 MHz
Low t
5
1.875 1.25 ns f
MAX
= 240 MHz
2.85 ns f
MAX
= 140 MHz
8.0 ns f
MAX
= 50 MHz
Pipeline Delay
6
t
PD
1.0 1.0 1.0 Clock cycles Not shown in Figure 2
Up Time
PSAVE
6
t
10
2 10 ns Not shown in Figure 2
PDOWN
t
11
320 ns Not shown in Figure 2
1
Maximum and minimum specifications are guaranteed over this range in Table 3.
2
Temperature range: T
MIN
to T
MAX
: −40°C to +85°C at 50 MHz and 140 MHz, and 0°C to 70°C at 240 MHz.
3
Timing specifications are measured with input levels of 3.0 V (V
IH
) and 0 V (V
IL
) for both 5 V and 3.3 V supplies.
4
Rise time was measured from the 10% to 90% point of zero to full-scale transition, and fall time from the 90% to 10% point of a full-scale transition.
5
Measured from 50% point of full-scale transition to 2% of final value.
6
Guaranteed by characterization.
7
f
CLK
maximum specification production tested at 125 MHz and 5 V. Limits specified in Table 3 are guaranteed by characterization.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

ADV7127KRU50-REEL

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Buy ADV7127KRU50-REEL
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC CMOS 240 MHz 10B High Speed DAC
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