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LTC4000IUFD-1#TRPBF

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LTC4000-1
13
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operaTion
CSP pin (source). The controller (A1) regulates the external
PMOS by driving the gate of the PMOS device such that the
voltage drop across IID and CSP is 8mV (typical). When
the external PMOS ability to deliver a particular current
with an 8mV drop across its source and drain is exceeded,
the voltage at the gate clamps at V
IGATE(ON)
and the PMOS
behaves like a fixed value resistor (R
DS(ON)
).
Note that this input ideal diode function is only enabled
when the voltage at the IN pin is within its operating range
(3V to 60V). To ensure that the external PMOS is turned
off when the voltage at the IN pin is not within is operating
range, a 10M pull-up resistor between the IGATE and the
CSP pin is recommended.
Input Voltage Regulation
One of the loops driving the ITH and CC pins is the input
voltage regulation loop (Figure 2). This loop prevents the
input voltage from dropping below the programmed level.
When a battery charge cycle begins, the battery charger
first determines if the battery is over-discharged. If the
battery feedback voltage is below V
LOBAT
, an automatic
trickle charge feature uses the charge current regulation
loop
to set the battery charge current to 10% of the pro-
grammed full-scale value. If the TMR pin is connected
to a capacitor or open, the bad battery detection timer is
enabled. When this bad battery detection timer expires
and the battery voltage is still below V
LOBAT
, the battery
charger automatically terminates and indicates, via the
F LT and CHRG pins, that the battery was unresponsive
to charge current.
Once the battery voltage is above V
LOBAT
, the charge current
regulation loop begins charging in full power constant-
current mode. In this case, the programmed full charge
current is set with a resistor on the CL pin.
Depending on available input power and external load
conditions, the battery charger may not be able to charge
at the full programmed rate. The external load is always
prioritized over the battery charge current. The input volt-
age programming is always observed, and only additional
power is available to charge the battery. When system
loads are light, battery charge current is maximized.
Once the float voltage is achieved, the battery float volt-
age regulation loop takes over from the charge current
regulation loop and initiates constant voltage charging. In
constant
voltage charging, charge current slowly declines.
Charge
termination can be configured with the TMR pin
in several ways. If the TMR pin is tied to the BIAS pin,
C/X termination is selected. In this case, charging is
terminated when constant voltage charging reduces the
charge current to the C/X level programmed at the CX
pin. Connecting a capacitor to the TMR pin selects the
charge timer termination and a charge termination timer
is started at the beginning of constant voltage charging.
Charging terminates when the termination timer expires.
When continuous charging at the float voltage is desired,
tie the TMR pin to GND to disable termination.
Upon charge termination, the PMOS connected to BGATE
behaves as an ideal diode from BAT to CSN. The diode
function prevents charge current but provides current
to the system load as needed. If the system load can be
completely supplied from the input, the battery PMOS turns
Figure 2. Input Voltage Regulation Loop
IN
CC
1V
ITH
LTC4000-1
IN CLN
R
IS
DC/DC INPUT
C
CLN
(OPTIONAL)
IFB
C
IN
–
+
–
+
C
C
TO DC/DC
40001 FO2
R
C
A4
R
IFB2
R
IFB1
When the input source is high impedance, the input volt-
age drops as the load current increases. In that case there
exists a voltage level at which the available power from
the input is maximum. For example, solar panels often
specify V
MP
, corresponding to the panel voltage at which
maximum power is achieved. With the LTC4000-1 input
voltage regulation, this maximum power voltage level can
be programmed at the IFB pin. The input voltage regulation
loop regulates ITH to ensure that the input voltage level
does not drop below this programmed level.
Battery Charger Overview
In addition to the input voltage regulation loop, the
LTC4000-1 regulates charge current, battery voltage and
output voltage.
LTC4000-1
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For more information www.linear.com/LTC4001-1
operaTion
off. While terminated, if the input voltage loop is not in
regulation, the output voltage regulation loop takes over to
ensure that the output voltage at CSP remains in control.
The output voltage regulation loop regulates the voltage
at the CSP pin such that the output feedback voltage at
the OFB pin is 1.193V.
If the system load requires more power than is available
from the input, the battery ideal diode controller provides
supplemental power from the battery. When the battery
voltage discharges below 97.1% of the float voltage
(V
BFB
< V
RECHRG(FALL)
), the automatic recharge feature
initiates a new charge cycle.
Charge Current Regulation
The first loop involved in a normal charging cycle is the
charge current regulation loop (Figure 3). This loop drives
the ITH and CC pins. This loop ensures that the charge
current sensed through the charge current sense resistor
(R
CS
) does not exceed the programmed full charge current.
tor divider does not consume battery current when the
battery is the only available power source. For V
IN
≥ 3V,
the typical resistance from the FBG pin to GND is 100Ω.
Output Voltage Regulation
When charging terminates and the system load is com-
pletely supplied from the
input, the PMOS connected to
BGA
TE is turned off. In this scenario, the output voltage
regulation loop takes over from the battery float voltage
regulation loop (Figure 5). The output voltage regulation
loop regulates the voltage at the CSP pin such that the
output feedback voltage at the OFB pin is 1.193V.
Figure 3. Charge Current Regulation Loop
Figure 4. Battery Float Voltage Regulation Loop with FBG
Figure 5. Output Voltage Regulation Loop with FBG
CSP
CC
1V
A5
ITH
LTC4000-1
CSP CSN
R
IS
BAT PMOS
TO SYSTEM
IBMON
CL
C
IBMON
(OPTIONAL)
C
CSP
+
–
–
+
+
–
–
C
C
TO DC/DC
40001 FO3
R
C
60k
50µA AT NORMAL
5µA AT TRICKLE
BIAS
A9
g
m
= 0.33m
R
CL
CC
1.136V
ITH
LTC4000-1
BFB
BAT
FBG
–
+
C
C
TO DC/DC
40001 FO4
R
C
R
BFB2
R
BFB1
A6
+
–
CC
1.193V
ITH
LTC4000-1
OFB
CSP
FBG
–
+
C
C
TO DC/DC
40001 FO5
R
C
R
OFB2
R
OFB1
A7
+
–
Battery Voltage Regulation
Once the float voltage is reached, the battery voltage regu-
lation loop takes over from the charge current regulation
loop (Figure 4).
The float voltage level is programmed using the feedback
resistor divider between the BAT pin and the FBG pin with
the center node connected to the BFB pin. Note that the
ground return of the resistor divider is connected to the
FBG pin. The FBG pin disconnects the resistor divider
load when V
IN
< 3V to ensure that the float voltage resis-
Battery Instant-On and Ideal Diode
The LTC4000-1 controls the external PMOS connected to
the BGATE pin with a controller similar to the input ideal
diode controller driving the IGATE pin. When not charg-
ing, the PMOS behaves as an ideal diode between the BAT
(anode) and the CSN (cathode) pins. The controller (A2)
regulates the external PMOS to achieve low loss conduc-
tion by driving the gate of the PMOS device such that the
voltage drop from the BAT pin to the CSN pin is 8mV.
When the ability to deliver a particular current with an 8mV
drop across the PMOS source and drain is exceeded, the
voltage at the gate clamps at V
BGATE(ON)
and the PMOS
behaves like a fixed value resistor (R
DS(ON)
).
LTC4000-1
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For more information www.linear.com/LTC4001-1
operaTion
The ideal diode behavior allows the battery to provide cur-
rent to the load when the input supply is in current limit
or the DC/DC converter is slow to react to an immediate
load increase at the output. In addition to the ideal diode
behavior, BGATE also allows current to flow from the CSN
pin to the BAT pin during charging.
There are two regions of operation when current is
flowing from the CSN pin to the BAT pin. The first is
when charging into a battery whose voltage is below
the instant-on threshold (V
OFB
< V
OUT(INST_ON)
). In this
region of operation, the controller regulates the voltage
at the CSP pin to be approximately 86% of the final float
voltage level (V
OUT(INST_ON)
). This feature provides a CSP
voltage significantly higher than the battery voltage when
charging into a heavily discharged battery. This instant-on
feature allows the LTC4000-1 to provide sufficient voltage
at the output (CSP pin), independent of the battery voltage.
The second region of operation is when the battery feedback
voltage is greater than or equal to the instant-on threshold
(V
OUT(INST_ON)
). In this region, the BGATE pin is driven
low and clamped at V
BGATE(ON)
to allow the PMOS to turn
completely on, reducing any power dissipation due to the
charge current.
Battery Temperature Qualified Charging
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to the
battery pack. The comparators CP3 and CP4 implement
the temperature detection as shown in the Block Diagram
in Figure 1. The rising threshold of CP4 is set at 75% of
V
BIAS
(cold threshold) and the falling threshold of CP3 is
set at 35% of V
BIAS
(hot threshold). When the voltage at
the NTC pin is above 75% of V
BIAS
or below 35% of V
BIAS
then the LTC4000-1 pauses any charge cycle in progress.
When the voltage at the NTC pin returns to the range of
40% to 70% of V
BIAS
, charging resumes.
When charging is paused, the external charging PMOS
turns off and charge current drops to zero. If the LTC4000-1
is charging in the constant voltage mode and the charge
termination timer is enabled, the timer pauses until the
thermistor indicates a return to a valid temperature. If the
battery charger is in the trickle charge mode and the bad
battery detection timer
is enabled, the bad battery timer
pauses
until the thermistor indicates a return to a valid
temperature.
Input UVLO and Voltage Monitoring
The regulated voltage on the BIAS pin is available as soon
as V
IN
≥ 3V. When V
IN
≥ 3V, the FBG pin is pulled low to
GND with a typical resistance of 100Ω and the rest of the
chip functionality is enabled.
When the IN pin is high impedance and a battery is con-
nected to the BAT pin, the BGATE pin is pulled down with
a 2μA (typical) current source to hold the battery PMOS
gate voltage at V
BGATE(ON)
below V
BAT
. This allows the
battery to power the output. The total quiescent current
consumed by LTC4000-1 from the battery when IN is not
valid is typically ≤ 10µA.
When the IN pin is high impedance, the input ideal diode
function for the external FET connected to the IGATE pin is
disabled. To ensure that this FET is completely turned off
when the voltage at the IN pin is not within its operating
range, connect a 10M pull-up resistor between the IGATE
pin and the CSP pin.
Besides the internal input UVLO, the LTC4000-1 also pro-
vides
voltage monitoring
through the VM pin. The RST pin
is pulled low when the voltage on the VM pin falls below
1.193V (typical). On the other hand, when the voltage on
the VM pin rises above 1.233V (typical), the RST pin is
high impedance.
One common use of this voltage monitoring feature is to
ensure that the converter is turned off when the voltage
at the input is below a certain level. In this case, connect
the RST pin to the DC/DC converter chip select or enable
pin (see Figure 6).
Figure 6. Input Voltage Monitoring with RST Connected to
the EN Pin of the DC/DC Converter
IN
CP1
LTC4000-1
IN CLN RST
R
IS
VM
40001 FO6
R
VM2
R
VM1
1.193V
+
–
IN
DC/DC
CONVERTER
EN
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LTC4000IUFD-1#TRPBF

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Buy LTC4000IUFD-1#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management High Voltage, High Current Controller for Battery Charging and Power Management
Lifecycle:
New from this manufacturer.
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