LTC4000-1
25
40001fa
For more information www.linear.com/LTC4001-1
In this configuration use the following formula to determine
the values of the three resistors:
R
VM3
= 1
1.193V
V
VM _RST
V
IN_REG
1V
R
IFB2
R
VM4
= 1.193
V
IN_REG
V
VM _RST
1
R
IFB2
Note that for the R
VM4
value to be positive, the ratio of
V
IN_REG
to V
VM_RST
has to be greater than 0.838.
When the RST pin of the LTC4000-1 is connected to the
SHDN or RUN pin of the converter, it is recommended that
the value of V
IN_REG
is set higher than the V
VM_RST
pin by a
significant margin. This is to ensure that any voltage noise
or ripple on the input supply pin does not cause the RST
pin to shut down the converter prematurely, preventing
the input regulation loop from functioning as expected.
As discussed in the input current monitoring section,
noise issues on the input node can be reduced by placing
a large filter capacitor on the CLN node (C
CLN
). To further
reduce the effect of any noise on the monitoring function,
another filter capacitor placed on the VM pin (C
VM
) is
recommended.
MPPT Temperature Compensation – Solar Panel
Example
The input regulation loop of the LTC4000-1 allows a user to
program a minimum input supply voltage regulation level
allowing for high impedance source to provide maximum
available power. With typical high
impedance source
such
as a solar panel, this maximum power point varies with
temperature.
A typical solar panel is comprised of a number of series-
connected cells, each cell being a forward-biased p-n
junction. As such, the open-circuit voltage (V
OC
) of a
solar cell has a temperature coefficient that is similar to
a common p-n junction diode, about –2mV/°C. The peak
power point voltage (V
MP
) for a crystalline solar panel
can be approximated as a fixed percentage of V
OC
, so the
temperature coefficient for the peak power point is similar
to that of V
OC
.
Panel manufacturers typically specify the 25°C values for
V
OC
, V
MP
and the temperature coefficient for V
OC
, making
determination of the temperature coefficient for V
MP
of a
typical panel straight forward.
applicaTions inForMaTion
IN
CC
1V
ITH
LTC4000-1
IN CLN RST
R
IS
DC/DC INPUT
TO DC/DC EN PIN
C
CLN
(OPTIONAL)
C
VM
IFB
VM
C
IN
+
+
C
C
TO DC/DC
COMPENSATION
PIN
40001 F16
R
C
A4
R
IFB2
R
VM4
R
VM3
CP1
+
1.193V
Figure 16. Input Voltage Monitoring and Input Voltage
Regulation Resistor Divider Combined
Figure 17. Temperature Characteristic of a Solar
Panel Open Circuit and Peak Power Point Voltages
TEMPERATURE (°C)
5
PANEL VOLTAGE
V
OC(25°C)
V
OC
– V
MP
V
MP(25°C)
4525
40001 F17
553515
V
MP
V
OC
V
OC
TEMP CO.
In a manner similar to the battery float voltage temperature
compensation, implementation of the MPPT temperature
compensation can be accomplished by incorporating an
LM234 into the input voltage feedback network. Using the
LTC4000-1
26
40001fa
For more information www.linear.com/LTC4001-1
feedback network in Figure 18, a similar set of equations
can be used to determine the resistor values:
R
IFB1
=
–R
SET
(TC 4405)
and
R
IFB2
=
R
IFB1
1V
V
MP(25°C)
+R
IFB1
0.0677
R
SET
1V
Where: TC = temperature coefficient in VC, and
V
MP(25°C)
= maximum power point voltage at 25°C in V.
typical sinking capability of the LTC4000-1 at the ITH pin
is 1mA at 0.4V with a maximum voltage range of 0V to 6V.
It is imperative that the local feedback of the DC/DC con-
verter be set up such that during regulation of any of the
LTC4000-1 loops this local loop is out of regulation and
sources as much current as possible from its ITH/VC pin.
For example for a DC/DC converter regulating its output
voltage, it is recommended that the converter feedback
divider is programmed to be greater than 110% of the
output voltage regulation level programmed at the OFB pin.
There are four feedback loops to consider when setting
up the compensation for the LTC4000-1. As mentioned
before these loops are: the input voltage loop, the charge
current loop, the float voltage loop and the output volt-
age loop. All of these loops have an error amp (A4-A7)
followed by another amplifier (A10) with the intermediate
node driving the CC pin and the output of A10 driving the
ITH pin as shown in Figure 19.
The most common com-
pensation
network of a series capacitor (C
C
) and resistor
(R
C
) between the CC pin and the ITH pin is shown here.
Each of the loops has slightly different dynamics due to
differences in the feedback signal path. The analytic de-
scription of the input voltage regulation loop is included
in the Appendix section. Please refer to the LTC4000 data
sheet for the analytic description of the other three loops.
In most situations, an alternative empirical approach to
compensation, as described here, is more practical.
applicaTions inForMaTion
Figure 18. Maximum Power Point Voltage Temperature
Compensation Feedback Network
R
IFB1
348k
R
IFB2
8.66k
IFB
R
LM234
V
+
V
INV
IN
LTC4000-1
R
SET
1k
40001 F18
Figure 19. Error Amplifier Followed by Output Amplifier Driving
CC and ITH Pins
CC
ITH
LTC4000-1
+
C
C
40001 F11
R
C
A4-A7
g
m4-7
= 0.2m
A10
g
m10
= 0.1m
+
R
O4-7
R
O10
For example, given a common 36-cell solar panel that has
the following specified characteristics:
Open circuit voltage (V
OC
) = 21.7V
Maximum power voltage (V
MP
) = 17.6V
Open-circuit voltage temperature coefficient
(V
OC
)=–78mV/°C
As the temperature coefficient for V
MP
is similar to that of
V
OC
, the specified temperature coefficient for V
OC
(TC) of
–78mV/°C and the specified peak power voltage (V
MP(25°C)
)
of 17.6V can be inserted into the equations to calculate the
appropriate resistor values for the temperature compensa-
tion network in Figure 18. With R
SET
equal to 1kΩ, then:
R
SET
= 1kΩ, R
IFB1
= 348kΩ, R
IFB2
= 8.66kΩ.
Compensation
In order for the LTC4000-1 to control the external DC/DC
converter, it has to be able to overcome the sourcing bias
current of the ITH or VC pin of the DC/DC converter. The
Empirical Loop Compensation
Based on the analytical expressions and the transfer
function from the ITH pin to the input and output current
of the external DC/DC converter, the user can analytically
LTC4000-1
27
40001fa
For more information www.linear.com/LTC4001-1
applicaTions inForMaTion
determine the complete loop transfer function of each of
the loops. Once these are obtained, it is a matter of analyz-
ing the gain and phase bode plots to ensure that there is
enough phase and gain margin at unity crossover with the
selected values of R
C
and C
C
for all operating conditions.
Even though it is clear that an analytical compensation
method is possible, sometimes certain complications
render this method difficult to tackle. These complica-
tions include the lack of easy availability of the switching
converter transfer function from the ITH or VC control
node to its input or output current, and the variability of
parameter values of the components such as the ESR of
the output capacitor or the R
DS(ON)
of the external PFETs.
Therefore a simpler and more practical way to compensate
the LTC4000-1 is provided here. This empirical method
involves injecting an AC signal into the loop, observing
the loop transient response and adjusting the C
C
and R
C
values to quickly iterate towards the final values. Much
of the detail of this method is derived from Application
Note19 which can be found at www.linear.com using
AN19 in
the search box.
Figure 20 shows the recommended setup to inject an
AC-coupled output load variation into the loop. A function
generator with 50Ω output impedance is coupled through
a 50Ω/1000µF series RC network to the regulator output.
Generator frequency is set at 50Hz. Lower frequencies
may cause a blinking scope display and higher frequen-
cies may not allow sufficient settling time for the output
transient. Amplitude of the generator output is typically
set at 5V
P-P
to generate a 100mA
P-P
load variation. For
lightly loaded outputs (I
OUT
< 100mA), this level may be
too high for small signal response. If the positive and
negative transition settling waveforms are significantly
different, amplitude should be reduced. Actual amplitude
is not particularly important because it is the shape of
the resulting regulator output waveform which indicates
loop stability.
A 2-pole oscilloscope filter with f = 10kHz is used to
block switching frequencies. Regulators without added
LC output filters have switching frequency signals at their
outputs which may be much higher amplitude than the
low frequency settling waveform to be studied. The filter
frequency is high enough for most applications to pass
the settling waveform with no distortion.
Oscilloscope and generator connections should
be made
exactly
as shown in Figure 20 to prevent ground loop er-
rors. The oscilloscope is synced by connecting the chan-
nelB probe to the generator output, with the ground clip
of the second probe connected to exactly the same place
as channel A ground. The standard 50Ω BNC sync output
of the generator should not be used because of ground
loop errors. It may also be necessary to isolate either
the generator or oscilloscope from its third wire (earth
Figure 20. Empirical Loop Compensation Setup
I
OUT
V
IN
CSN
CSP
IN
CLN
BATGND
LTC4000-1
50Ω
1W
50Ω
GENERATOR
f = 50Hz
R
C
ITHGND
SWITCHING
CONVERTER
40001 F20
BGATE
ITH CC
C
C
1000µF
(OBSERVE
POLARITY)
SCOPE
GROUND
CLIP
10k
A
1k
1500pF0.015µF
B

LTC4000IUFD-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management High Voltage, High Current Controller for Battery Charging and Power Management
Lifecycle:
New from this manufacturer.
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