STP8N120K5 Datasheet STP8N120K5 | P4-P6

Table 7. Source-drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

SD

Source-drain current - 6 A

I

SDM

(1)

Source-drain current (pulsed) - 12 A

V

SD

(2)

Forward on voltage

I

SD

= 5 A, V

GS

= 0 V

- 1.5 V

t

rr

Reverse recovery time

I

SD

= 5 A, V

DD

= 60 V,

di/dt = 100 A/µs

(see Figure 15. Test circuit for

inductive load switching and

diode recovery times)

- 327 ns

Q

rr

Reverse recovery charge - 3 µC

I

RRM

Reverse recovery current - 18.4 A

t

rr

Reverse recovery time

I

SD

= 5 A, V

DD

= 60 V,

di/dt = 100 A/µs, T

j

= 150 °C

(see Figure 15. Test circuit for

inductive load switching and

diode recovery times)

- 485 ns

Q

rr

Reverse recovery charge - 3.9 µC

I

RRM

Reverse recovery current - 16 A

1. Pulse width limited by safe operating area.

2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.

Table 8. Gate-source Zener diode

Symbol

Parameter Test conditions Min. Typ. Max Unit

V

(BR)GSO

Gate-source breakdown voltage

I

GS

= ±1 mA, I

D

= 0 A

±30 - - V

The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.

The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for

additional external componentry.

STP8N120K5

Electrical characteristics

DS12529 - Rev 3

page 4/13

2.1 Electrical characteristics (curves)

Figure 1. Safe operating area

GIPG180420181311SOA

10

1

10

0

10

-1

10

-2

10

-1

10

0

10

1

10

2

10

3

I

D

(A)

V

DS

(V)

t

p

=10 µs

t

p

=100 µs

t

p

=1 ms

t

p

=10 ms

Operation in this area is

limited by R

DS(on)

single pulse

T

J

≤150 °C

T

C

=25 °C

V

GS

=10 V

Figure 2. Thermal impedance

Figure 3. Output characteristics

GADG040420181101OCH

8

6

4

2

0

0 4 8 12 16

I

D

(A)

V

DS

(V)

V

GS

= 6 V

V

GS

= 7 V

V

GS

= 8 V

V

GS

= 9, 10 V

Figure 4. Transfer characteristics

GADG040420181100TCH

8

6

4

2

0

4 5 6 7 8

I

D

(A)

V

GS

(V)

V

DS

= 20 V

Figure 5. Gate charge vs gate-source voltage

GIPG180420180911QVG

16

12

8

4

0

800

600

400

200

0

0 4 8 12 16

V

GS

(V)

V

DS

(V)

Q

g

(nC)

V

DS

V

DD

= 960 V

I

D

= 5 A

Q

g

Q

gs

Q

gd

Figure 6. Static drain-source on-resistance

GADG040420181100RID

1.85

1.75

1.65

1.55

1.45

0 1 2 3 4 5

R

DS(on)

(Ω)

I

D

(A)

V

GS

= 10 V

STP8N120K5

Electrical characteristics (curves)

DS12529 - Rev 3

page 5/13

Figure 7. Capacitance variations

GADG030420180840CVR

10

3

10

2

10

1

10

0

10

-1

10

-2

10

-1

10

0

10

1

10

2

C

(pF)

V

DS

(V)

C

ISS

C

OSS

C

RSS

f = 1 MHz

Figure 8. Normalized gate threshold voltage vs

temperature

GADG040420181102VTH

1.2

1

0.8

0.6

0.4

-75 -25 25 75 125

V

GS(th)

(norm.)

T

j

(°C)

I

D

= 100 µA

Figure 9. Normalized on-resistance vs temperature

GADG040420181103RON

2.5

2

1.5

1

0.5

0

-75 -25 25 75 125

R

DS(on)

(norm.)

T

j

(°C)

V

GS

= 10 V

Figure 10. Normalized V

(BR)DSS

vs temperature

GADG040420181102BDV

1.12

1.08

1.04

1

0.96

0.92

0.88

-75 -25 25 75 125

V

(BR)DSS

(norm.)

T

j

(°C)

I

D

= 1 mA

Figure 11. Source-drain diode forward characteristics

GADG040420181103SDF

0.9

0.8

0.7

0.6

0.5

0 1 2 3 4 5

V

SD

(V)

I

SD

(A)

T

j

= -50 °C

T

j

= 25 °C

T

j

= 150 °C

Figure 12. Maximum avalanche energy vs starting T

J

GADG040420181104EAS

400

300

200

100

0

-75 -25 25 75 125

E

AS

(mJ)

T

J

(°C)

I

D

= 1.7 A, V

DD

= 50 V

Single pulse,

STP8N120K5

Electrical characteristics (curves)

DS12529 - Rev 3

page 6/13

STP8N120K5

STP8N120K5

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