8545AGI-02 REVISION A 5/7/15 10 ©2015 Integrated Device Technology, Inc.
8545I-02 Data Sheet LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
Power Considerations
This section provides information on power dissipation and junction temperature for the 8545I-02.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 8545I-02 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)
MAX
= V
DD_MAX
* I
DD_MAX
= 3.465V * 90mA = 311.85mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The
maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 91.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.312W * 91.1°C/W = 113.4°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
JA
for 20 Lead TSSOP, Forced Convection
JA
by Velocity
Meters per Second 012.5
Multi-Layer PCB, JEDEC Standard Test Boards 91.1°C/W 86.7°C/W 84.6°C/W
