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STM6505WCABDG6F

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DC and AC parameters STM6502, STM6503, STM6504, STM6505
16/29 Doc ID 16101 Rev 6
4 DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristics tables that
follow, are derived from tests performed under the measurement conditions summarized in
Table 5: Operating and measurement conditions. Designers should check that the operating
conditions in their circuit match the operating conditions when relying on the quoted
parameters.
Figure 14. AC testing input/output waveforms
Table 5. Operating and measurement conditions
Parameter Value Unit
V
CC
supply voltage 1.0 to 5.5 V
Ambient operating temperature (T
A
) –40 to +85 °C
Input rise and fall times ≤
5ns
Input pulse voltages 0.2 to 0.8 V
CC
V
Input and output timing ref. voltages 0.3 to 0.7 V
CC
V
0.8 V
CC
0.2 V
CC
0.7 V
CC
0.3 V
CC
AM00478
STM6502, STM6503, STM6504, STM6505 DC and AC parameters
Doc ID 16101 Rev 6 17/29
Table 6. DC and AC characteristics
Symbol Parameter Test conditions
(1)
Min. Typ.
(2)
Max. Unit
V
CC
Supply voltage range Reset output valid - active-low 1.0 5.5 V
I
CC
Supply current (inputs
in their inactive state,
t
REC
and t
SRC
counter
is inactive)
STM6502
V
CC
= 5.0 V 1.2 µA
V
CC
= 3.0 V
(3)
1.1 µA
STM6503
V
CC
= 5.0 V, TSR left open 4 5.8 µA
V
CC
= 3.0 V, TSR left open
(3)
3µA
STM6504
V
CC
= 5.0 V, TSR left open 4 5.8 µA
V
CC
= 3.0 V, TSR left open
(3)
3µA
STM6505
V
CC
= 5.0 V 2.3 3.3 µA
V
CC
= 3.0 V
(3)
2.2 µA
Output characteristics
V
OL
Reset output voltage low
(reset asserted: RST
, BLD)
V
CC
≥ 4.5 V, sinking 3.2 mA 0.3 V
V
CC
≥ 3.3 V, sinking 2.5 mA 0.3 V
V
CC
≥ 1.0 V, sinking 0.1 mA 0.3 V
t
REC
Reset timeout delay,
factory-programmed
Option A 140 210 280 ms
Option B 240 360 480 ms
V
CC
monitoring reset thresholds
V
RST
Fixed voltage trip point for
V
CC
monitoring (refer to
Table 7)
–40 to +85 °C
V
RST
–2.5%
V
RST
V
RST
+2.5%
V
25 °C
V
RST
–2.0%
V
RST
V
RST
+2.0%
V
V
HYST
Hysteresis of V
RST
L, M 0.5%
T, S, R, Z, Y, W, V 1%
V
CC
to reset delay
V
CC
falling from
(V
RST
+ 100 mV) to (V
RST
- 100 mV) at
10 mV/µs
(4)
20 µs
V
BAT
monitoring
V
BATTH
Fixed V
BAT
monitoring
threshold
STM6505 only 1.225 1.25 1.275 V
V
BATHYST
V
BATTH
hysteresis STM6505 only 8 16 mV
I
LI(VBAT)
V
BAT
input leakage current STM6505 only –100 10 100 nA
DC and AC parameters STM6502, STM6503, STM6504, STM6505
18/29 Doc ID 16101 Rev 6
Smart Reset inputs
V
IL
SR0, SR1, SRE input
voltage low
V
SS
–0.3
0.3
V
CC
V
V
IH
SR0, SR1, SRE input
voltage high
0.7
V
CC
5.5 V
I
LI(SR)
Input leakage current, SR
and SRE inputs
Option without internal pull-up resistor –1 +1 µA
I
LI(TSR)
Input leakage current, TSR
input
STM6503 and STM6504 only –5 +7 µA
R
PUI
Internal pull-up resistor,
input (optional - refer to
Table 12)
65 kΩ
t
DEBOUNCE
SRE input falling edge
debounce time
STM6504 only 240 360 480 ms
Smart Reset delay
t
SRC
(5)
Capacitor-programmable
Smart Reset setup time,
STM6502 and STM6505.
Refer to Ta ble 3 .
T
A
= 25 °C
10 x
C
SRC
(µF)
12.5 x
C
SRC
(µF)
15 x
C
SRC
(µF)
s
t
SRC
(5)
TSR pin-programmable
Smart Reset setup time,
STM6503 and STM6504.
TSR = V
SS
22.53s
TSR = floating
(6)
67.59s
TSR = V
CC
10 12.5 15 s
1. Valid for ambient operating temperature: T
A
= –40 to +85 °C; V
CC
= 1.0 to 5.5 V (except where noted).
2. Typical value is at 25 °C and V
CC
= 3.3 V unless otherwise noted.
3. For devices with V
RST
< 3.0 V.
4. Guaranteed by design.
5. Input glitch immunity is equal to t
SRC
(when both SR inputs are low, otherwise infinite). STM6502, STM6503, STM6505
only.
6. If left open, for improved system glitch immunity it is strongly recommended to connect a 0.1 µF decoupling ceramic
capacitor between the TSR and V
SS
pins.
Table 6. DC and AC characteristics (continued)
Symbol Parameter Test conditions
(1)
Min. Typ.
(2)
Max. Unit
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STM6505WCABDG6F

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Buy STM6505WCABDG6F
Manufacturer:
STMicroelectronics
Description:
Supervisory Circuits Dual Push-Button Smart Reset Adjust
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