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STM6505WCABDG6F

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STM6502, STM6503, STM6504, STM6505 List of figures
Doc ID 16101 Rev 6 4/29
List of figures
Figure 1. Logic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Block diagram - STM6502, STM6503, STM6504 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Block diagram - STM6505 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5. Single-button Smart Reset typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. Dual-button Smart Reset typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 7. STM6502, STM6503 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. STM6504 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. STM6505 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Supply current (I
CC
) vs. temperature (STM6505) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Smart Reset delay (t
SRC
) vs. temperature, C
SRC
= 0.62 µF (STM6505) . . . . . . . . . . . . . . 13
Figure 12. Reset threshold (V
RST
) vs. temperature, “S” threshold option, V
CC
falling (STM6505) . . . 14
Figure 13. V
BAT
monitoring threshold (V
BATTH
)
vs. temperature, falling (STM6505) . . . . . . . . . . . . . . 14
Figure 14. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 15. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline . . . . . . . . . . . . . . . . . . . . . 21
Figure 16. Landing pattern - TDFN – 8-lead 2 x 2 mm without thermal pad . . . . . . . . . . . . . . . . . . . . 22
Figure 17. Carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 18. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 19. Tape trailer/leader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 20. Pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 21. Package marking, top view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
STM6502, STM6503, STM6504, STM6505 Description
Doc ID 16101 Rev 6 5/29
1 Description
STM6502 has two combined Smart Reset inputs (SR0 and SR1) with delayed Smart Reset
setup time (t
SRC
) programmed by an external capacitor on the SRC pin.
STM6503 is similar to STM6502, has two combined delayed Smart Reset inputs (SR0
, SR1)
and three user-selectable delayed Smart Reset setup time (t
SRC
) options of 2 s, 6 s and 10
s through a three-state TSR input pin: when connected to ground, t
SRC
= 2 s; when left
open, t
SRC
= 6 s; when connected to V
CC
, t
SRC
= 10 s (all the times are minimum).
STM6504 has two independent Smart Reset inputs. SR0
provides the delayed Smart Reset
setup time (t
SRC
) function with three user-selectable t
SRC
options through a three-state TSR
input pin: when connected to ground, t
SRC
= 2 s; when left open, t
SRC
= 6 s; when
connected to V
CC
, t
SRC
= 10 s (all the times are minimum). SRE provides instant reset. SRE
is edge-triggered with a special debounce time (t
DEBOUNCE
= 240 ms min.) at the falling
edge after a valid reset period.
STM6505 has two combined delayed Smart Reset inputs (SR0
, SR1) and provides an
adjustable reset delay setup time via an external capacitor connected to the SRC pin.
The RST
output depends also on the V
CC
monitoring threshold. STM6505 also provides
independent low battery detect (BLD
) output controlled by the secondary external input
voltage V
BAT
. V
BAT
is monitored for low voltage and provides an indication on the battery low
detect output pin (BLD
). V
BAT
threshold is 1.25 V, fixed, and an external resistor divider is to
be used to set the actual battery voltage threshold. V
BAT
threshold hysteresis is 8 mV typ.
(16 mV max.). V
BAT
is voltage monitoring input only, the device is powered only from the
V
CC
pin; V
CC
must be ≥ 1.575 V for proper operation of the V
BAT
comparator.
1.1 Smart Reset devices
The Smart Reset device family STM65xx provides a useful feature that ensures inadvertent
short reset push-button closures do not cause system resets. This is done by implementing
extended Smart Reset input delay (t
SRC
). Once the valid Smart Reset input levels and setup
delay are met, the device generates an output reset pulse with user-programmable timeout
period (t
REC
).
The Smart Reset inputs can be also connected to the applications interrupt to allow the
control of both the interrupt pin and the hard reset functions. If the push-buttons are closed
for a short time, the processor is only interrupted. If the system still does not respond
properly, holding the push-buttons for the extended setup time (t
SRC
) causes hard reset of
the processor through the reset outputs. The Smart Reset feature helps significantly
increase system stability.
The STM65xx family of Smart Reset devices consists of low current microprocessor reset
circuits targeted at applications such as MP3 players, navigation, smartphones or mobile
phones; generally any application that requires delayed reset push-button(s) response for
improved system stability. The STM65xx devices feature single or dual Smart Reset inputs
(SR). The delayed Smart Reset setup time (t
SRC
) options of 2 s, 6 s and 10 s (all min.) are
adjustable by an external capacitor on the SRC pin or selectable by three-state logic. The
delayed setup period ignores switch closures shorter than t
SRC
, thus preventing unwanted
resets.
Description STM6502, STM6503, STM6504, STM6505
6/29 Doc ID 16101 Rev 6
The STM65xx devices have active-low (optionally active-high) open-drain reset (RST)
output(s) with or without internal pull-up resistor or push-pull as output options, with factory-
programmed or capacitor-adjustable or push-buttons defined output reset pulse duration,
with or without power-on reset function.
Some devices also have an undervoltage monitoring feature: the reset output is also
asserted when the monitored supply voltage V
CC
drops below the specified threshold. The
reset output remains asserted for the reset timeout period (t
REC
) after the monitored supply
voltage goes above the specified threshold.
Figure 1. Logic diagrams
Figure 2. Pin connections
AM00378
V
CC
SR0
RST
V
SS
STM6502
SR1
SR0
SR1
SRC
V
CC
RST
V
SS
STM6503
V
CC
RST
V
SS
STM6504
SR0
SRE
V
CC
BLD
RST
V
SS
STM6505
SR1
SR0
SRC
V
BAT
TSR
TSR
AM00379
SRC
NC NC
1
2
3
STM
6502
4
8
7
6
5
RST
V
SS
V
CC
SR1
SR0
TSR
NC NC
1
2
3
STM
6503
4
8
7
6
5
RST
V
SS
V
CC
SR0
SR1
TSR
NC
NC
1
2
3
STM
6504
4
8
7
6
5
RST
V
SS
V
CC
SRE
SR0
BLD
SRC
V
BAT
1
2
3
STM
6505
4
8
7
6
5
RST
V
SS
V
CC
SR1
SR0
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STM6505WCABDG6F

Mfr. #:
Buy STM6505WCABDG6F
Manufacturer:
STMicroelectronics
Description:
Supervisory Circuits Dual Push-Button Smart Reset Adjust
Lifecycle:
New from this manufacturer.
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