STM6502, STM6503, STM6504, STM6505 Description
Doc ID 16101 Rev 6 7/29
Table 2. Signal names
Symbol
Input/
output
Description
RST
Output Open-drain reset output, active-low.
BLD
Output Battery low detect output, active-low, open-drain. STM6505 only.
SR0
Input
Primary push-button Smart Reset input. Active-low, with or without internal
65 kΩ pull-up to V
CC
(product options).
SR1
Input
Secondary push-button Smart Reset input - combines with the primary push-
button reset to provide setup delay time before reset. Active-low, with or without
internal 65 kΩ pull-up to V
CC
(product options).
SRE Input
Secondary push-button Smart Reset input - provides instant Smart Reset. SRE
is edge-triggered with a special debounce time (t
DEBOUNCE
= 240 ms min.) at
the falling edge after a valid reset period. Active-high, no internal pull-up to V
CC
.
STM6504 only.
SRC Input
Smart Reset input delay setup control: connect to an external capacitor to adjust
the delay setup time (t
SRC
). STM6502 and STM6505 only.
TSR Input
A three-state Smart Reset input delay setup control. When connected to
ground, t
SRC
= 2 s; when left open, t
SRC
= 6 s; when connected to V
CC
,
t
SRC
= 10 s (all times are minimum). TSR is a DC-type input, intended to be
either permanently grounded, permanently connected to V
CC
or permanently
left open. If left open, for improved system glitch immunity it is strongly
recommended to connect a 0.1 µF decoupling ceramic capacitor between the
TSR and V
SS
pins. STM6503 and STM6504 only.
V
CC
Supply
Supply voltage input. Power supply for the device and an input for the monitored
supply voltage. A 0.1 µF decoupling ceramic capacitor is recommended to be
connected between the V
CC
and V
SS
pins.
V
BAT
Input Battery voltage monitoring input. STM6505 only.
V
SS
Supply Ground
NC No connect (not bonded); should be connected to V
SS
.
Description STM6502, STM6503, STM6504, STM6505
8/29 Doc ID 16101 Rev 6
Figure 3. Block diagram - STM6502, STM6503, STM6504
1. STM6504 only: SR0 and SRE are working independently. SRE is edge-triggered and has a special
debounce time (t
DEBOUNCE
= 240 ms min.) at the falling edge after a valid reset period.
Figure 4. Block diagram - STM6505
V
CC
V
RST
COMPARE
SR0
SRC (STM6502)
TSR (STM6503,
STM6504)
RST
t
REC
generator
Logic
SR1
(SRE
STM6504
only)
(1)
Logic
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STM6502, STM6503, STM6504, STM6505 Description
Doc ID 16101 Rev 6 9/29
Figure 5. Single-button Smart Reset typical hookup
Figure 6. Dual-button Smart Reset typical hookup
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STM6505WCABDG6F

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Supervisory Circuits Dual Push-Button Smart Reset Adjust
Lifecycle:
New from this manufacturer.
Delivery:
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