STMPE1600QTR Datasheet STMPE1600QTR | P13-P15

STMPE1600 Register map

Doc ID 16938 Rev 3 13/27

4 Register map

Table 7. Register map

Address Register name Size (bit) Function

0x00 Chip ID LSB 8 0x00

0x01 Chip ID MSB 8 0x16

0x02 Version ID 8 Revision number (0x01)

0x03 SystemControl 8 Reset and interrupt control

0x04-

0x07

Reserved Reserved

0x08

IEGPIOR

8 GPIO interrupt enable register LSB

0x09 8 GPIO interrupt enable register MSB

0x0A

ISGPIOR

8 GPIO interrupt status register LSB

0x0B 8 GPIO interrupt status register MSB

0x10

GPMR

8 GPIO monitor pin state register LSB

0x11 8 GPIO monitor pin state register MSB

0x12

GPSR

8 GPIO set pin state register LSB

0x13 8 GPIO set pin state register MSB

0x14

GPDR

8 GPIO set pin direction register LSB

0x15 8 GPIO set pin direction register MSB

0x16

GPPIR

8 GPIO polarity inversion register LSB

0x17 8 GPIO polarity inversion register MSB

0x18-

0xFF

Reserved Reserved

System control register STMPE1600

14/27 Doc ID 16938 Rev 3

5 System control register

SYS_CTRL System control register

Address: 0x03

Type: RW

Reset: 0x00

Description: System control register.

76543 2 1 0

SOFT

RESET

I2C_SHDN Wakeup_En RESERVED RESERVED INT_Enable RESERVED INT_Polarity

RW RW RW

––

–

[7] SOFT RESET:

Writing ‘1’ to this bit causes a soft reset

Cleared by hardware.

[6] I2C_SHDN:

Writing ‘1’ to this bit shuts down the I2C block on the next valid I2C clock.

In shut-down mode, only 2 possible ways exist to re-activate the device:

- Remove and reconnect Vcc

- Wake_up through the GPIO_0 pin if programmed as a hot-key and if Wakeup Enable bit of

this register is enabled

All GPIO states remain the same on entering shut-down mode.

[5] Wakeup_En:

Wakeup Enable bit

‘1’ to enable GPIO_0 as clock gating signal during shutdown

‘0’ to disable the above

[4] RESERVED

[3] RESERVED

[2] INT_Enable:

‘1’ to enable interrupt output

‘0’ to disable interrupt output

When the interrupt output is disabled, it is in floating condition but it does not consume current

[1] RESERVED

[0] INT_Polarity:

Interrupt polarity

‘1’ for active High

‘0’ for active LOW

STMPE1600 Interrupt system

Doc ID 16938 Rev 3 15/27

6 Interrupt system

The STMPE1600 can be configured to generate an interrupt when there is a logic transition

on any of the GPIO configured as an input.

IEGPIOR Interrupt enable GPIO mask register

Address: 0x08, 0x09

Type: RW

Reset: 0x00

Description: Interrupt enable GPIO mask register (IEGPIOR)

The IEGPIOR register is used to enable the interruption from a particular GPIO

interrupt source to the host. The IEG[15:0] bits are the interrupt enable mask bits

corresponding to the GPIO[15:0] pins.

1514131211109876543 2 1 0

IEG15 IEG14 IEG13 IEG12 IEG11 IEG10 IEG9 IEG8 IEG7 IEG6 IEG5 IEG4 IEG3 IEG2 IEG1 IEG0

RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW

[15:0] IEG[x]: Interrupt enable GPIO mask (where x = 15 to 0)

Writing a ‘1’ to the IE[x] bit will enable the interruption to the host.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27

STMPE1600QTR

Mfr. #:

Buy STMPE1600QTR

Manufacturer:

STMicroelectronics

Description:

Interface - I/O Expanders 16-bit Xpander Logic Ultra-Low Power

Lifecycle:

New from this manufacturer.

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STMPE1600QTR