LTC4274
16
4274fe
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APPLICATIONS INFORMATION
Operating Modes
The LTC4274 can operate in one of four modes: manual,
semi-auto, AUTO pin, or shutdown.
Table 1. Operating Modes
MODE
AUTO
PIN OPMD
DETECT/
CLASS POWER-UP
AUTOMATIC
I
CUT
/I
LIM
ASSIGNMENT
AUTO Pin 1 11b Enabled at
Reset
Automatically Yes
Reserved 0 11b N/A N/A N/A
Semi-auto 0 10b Host
Enabled
Upon
Request
No
Manual 0 01b Once Upon
Request
Upon
Request
No
Shutdown 0 00b Disabled Disabled No
In manual mode, the port waits for instructions from the
host system before taking any action. It runs a single
detection or classification cycle when commanded to
by the host, and reports the result in its Port Status
register. The host system can command the port to
turn on or off the power at any time. This mode should
only be used for diagnostic and test purposes.
In semi-auto mode, the port repeatedly attempts to
detect and classify any PD attached to it. It reports the
status of these attempts back to the host, and waits for
a command from the host before turning on power to
the port. The host must enable detection (and optionally
classification) for the port before detection will start.
AUTO pin mode operates the same as semi-auto mode
except that it will automatically turn on the power to the
port if detection is successful. In AUTO pin mode, I
CUT
and I
LIM
values are set automatically by the LTC4274.
This operational mode is only valid if the AUTO pin
is high at reset or power-up and remains high during
operation.
In shutdown mode, the port is disabled and will not
detect or power a PD.
Regardless of which mode it is in, the LTC4274 will remove
power automatically from a port that generates a current
limit fault. It will also automatically remove power from a
port that generates a disconnect event if disconnect detec-
tion is enabled. The host controller may also command
the port to remove power at any time.
Reset and the AUTO/MID Pins
The initial LTC4274 configuration depends on the state
of the AUTO and MID pins during reset. Reset occurs at
power-up, or whenever the RESET pin is pulled low or
the global Reset All bit is set. Changing the state of AUTO
or MID after power-up will not properly change the port
behavior of the LTC4274 until a reset occurs.
Although typically used with a host controller, the LTC4274
can also be used in a standalone mode with no connec-
tion to the serial interface. If there is no host present,
the AUTO pin must be tied high so that, at reset, the port
will be configured to operate automatically. The port will
detect and classify repeatedly until a PD is discovered,
set I
CUT
and I
LIM
according to the classification results,
apply power after successful detection, and remove power
when a PD is disconnected. Similarly, if the standalone
application is a midspan, the MID pin must be tied high
to enable correct midspan detection timing.
Table 2 shows the I
CUT
and I
LIM
values that will be
automatically set in AUTO pin mode, based on the dis-
covered class.
Table 2. I
CUT
and I
LIM
Values in AUTO Pin Mode
CLASS I
CUT
I
LIM
Class 1 112mA 425mA
Class 2 206mA 425mA
Class 3 or Class 0 375mA 425mA
Class 4 638mA 850mA
The automatic setting of the I
CUT
and I
LIM
values only
occurs if the LTC4274 is reset with the AUTO pin high.
LTC4274
17
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APPLICATIONS INFORMATION
DETECTION
Detection Overview
To avoid damaging network devices that were not designed
to tolerate DC voltage, a PSE must determine whether the
connected device is a real PD before applying power. The
IEEE specification requires that a valid PD have a common-
mode resistance of 25k ±5% at any port voltage below
10V. The PSE must accept resistances that fall between
19k and 26.5k, and it must reject resistances above 33k
or below 15k (shaded regions in Figure 11). The PSE may
choose to accept or reject resistances in the undefined
areas between the must-accept and must-reject ranges. In
particular, the PSE must reject standard computer network
ports, many of which have 150Ω common-mode termina-
tion resistors that will be damaged if power is applied to
them (the black region at the left of Figure 11).
and short circuits, are also reported. If the port measures
less than 1V at the first forced-current test, the detection
cycle will abort and Short Circuit will be reported. Table 3
shows the possible detection results.
Table 3. Detection Status
MEASURED PD SIGNATURE DETECTION RESULT
Incomplete or Not Yet Tested Detect Status Unknown
<2.4k Short Circuit
Capacitance > 2.7µF C
PD
too High
2.4k < R
PD
< 17k R
SIG
too Low
17k < R
PD
< 29k Detect Good
>29k R
SIG
too High
>50k Open Circuit
Voltage > 10V Port Voltage Outside Detect Range
Operating Modes
The ports operating mode determines when the LTC4274
runs a detection cycle. In manual mode, the port will
idle until the host orders a detect cycle. It will then run
detection, report the results, and return to idle to wait for
another command.
In semi-auto mode, the LTC4274 autonomously polls the
port for PDs, but it will not apply power until commanded
to do so by the host. The Port Status register is updated
at the end of each detection cycle. If a valid signature
resistance is detected and classification is enabled, the
port will classify the PD and report that result as well.
Figure 12. PD Detection
Figure 11. IEEE 802.3af Signature Resistance Ranges
4-Point Detection
The LTC4274 uses a 4-point detection method to discover
PDs. False-positive detections are minimized by check-
ing for signature resistance with both forced-current and
forced-voltage measurements. Initially, two test currents
are forced onto the port (via the OUT pin) and the resulting
voltages are measured. The detection circuitry subtracts
the two V-I points to determine the resistive slope while
removing offset caused by series diodes or leakage at
the port (see Figure 12). If the forced-current detection
yields a valid signature resistance, two test voltages are
then forced onto the port and the resulting currents are
measured and subtracted. Both methods must report valid
resistances for the port to report a valid detection. PD
signature resistances between 17k and 29k (typically) are
detected as valid and reported as Detect Good in the Port
Status register. Values outside this range, including open
RESISTANCE
PD
PSE
10k
15k
4274 F11
19k 26.5k
26.25k23.75k
150Ω (NIC)
20k 30k
33k
FIRST
DETECTION
POINT
SECOND
DETECTION
POINT
VALID PD
25kΩ SLOPE
275
165
CURRENT (µA)
0V-2V
OFFSET
VOLTAGE
4274 F12
LTC4274
18
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APPLICATIONS INFORMATION
The port will then wait for at least 100ms (or 2 seconds if
midspan mode is enabled), and will repeat the detection
cycle to ensure that the data in the Port Status register
is up-to-date.
If the port is in semi-auto mode and high power opera-
tion is enabled, the port will not turn on in response to
a power-on command unless the current detect result is
detect good. Any other detect result will generate a t
START
fault if a power-on command is received. If the port is not
in high power mode, it will ignore the detection result and
apply power when commanded, maintaining backwards
compatibility with the LTC4259A.
Behavior in AUTO pin mode is similar to semi-auto; how-
ever, after Detect Good is reported and the port is classified
(if classification is enabled), it is automatically powered
on without further intervention. In standalone (AUTO pin)
mode, the I
CUT
and I
LIM
thresholds are automatically set;
see the Reset and the AUTO/MID Pins section for more
information.
The signature detection circuitry is disabled when the
port is initially powered up with the AUTO pin low, in
shutdown mode, or when the corresponding Detect
Enable bit is cleared.
Detection of Legacy PDs
Proprietary PDs that predate the original IEEE 802.3af
standard are commonly referred to today as legacy de-
vices. One type of legacy PD uses a large common-mode
capacitance (>10μF) as the detection signature. Note that
PDs in this range of capacitance are defined as invalid, so
a PSE that detects legacy PDs is technically noncompliant
with the IEEE spec.
The LTC4274 can be configured to detect this type of
legacy PD. Legacy detection is disabled by default, but
can be manually enabled. When enabled, the port will
report Detect Good when it sees either a valid IEEE PD or
a high-capacitance legacy PD. With legacy mode disabled,
only valid IEEE PDs will be recognized.
CLASSIFICATION
802.3af Classification
A PD can optionally present a classification signature to
the PSE to indicate the maximum power it will draw while
operating.
The IEEE specification defines this signature as
a constant current draw when the PSE port voltage is in the
V
CLASS
range (between 15.5V and 20.5V), with the current
level indicating one of 5 possible PD classes. Figure
13
shows a typical PD load line, starting with the slope of the
25kΩ signature resistor below 10V, then transitioning to
the classification signature current (in this case, Class 3)
in the V
CLASS
range. Table 4 shows the possible clas-
sification values.
Table 4. Classification Values
CLASS RESULT
Class 0 No Class Signature Present; Treat Like Class 3
Class 1 3W
Class 2 7W
Class 3 13W
Class 4 25.5W (Type 2)
If classification is enabled, the port will classify the PD
immediately after a successful detection cycle in semi-auto
or AUTO pin modes, or when commanded to in manual
mode. It measures the PD classification signature by ap-
plying 18V for 12ms (both values typical) to the port via
Figure 13. PD Classification
VOLTAGE (V
CLASS
)
0
CURRENT (mA)
60
50
40
30
20
10
0
5 10 15 20
4274 F13
25
TYPICAL
CLASS 3
PD LOAD
LINE
48mA
33mA
PSE LOAD LINE
23mA
14.5mA
6.5mA
CLASS 4
CLASS 2
CLASS 1
CLASS 0
CLASS 3
OVER
CURRENT

LTC4274IUHF#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN PoE+ 25.5W Single PSE Controller
Lifecycle:
New from this manufacturer.
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