6.424
IDT71P71204 (2M x 8-Bit), 71P71104 (2M x 9-Bit), 71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit)
Advance Information
18 Mb DDR II SRAM Burst of 2 Commercial Temperature Range
Symbol Pin Function Description
Doff
Input
DLL Turn Off. When low this input will turn off the DLL inside the device. The AC timings with
the DLL turned off will be different from those listed in this data sheet. There will be an
increased propagation delay from the incidence of C and C to DQ, or K and K to DQ as
configured. The propagation delay is not a tested parameter, but will be similar to the
propagation delay of other SRAM devices in this speed grade.
TDO Output TDO pin for JTAG
TCK Input TCK pin for JTAG.
TDI Input TDI pin for JTAG. An internal resistor will pull TDI to V
when the pin is unconnected.
TMS Input TMS pin for JTAG. An internal resistor will pull TMS to V
when the pin is unconnected.
NC No Connect No connects inside the package. Can be tied to any voltage level
V
REF
Input
Reference
Reference Voltage input. Static input used to set the reference level for HSTL inputs and
outputs as well as AC measurement points.
V
DD
Power
Supply
Power supply inputs to the core of the device. Should be connected to a 1.8V power
supply.
V
SS
Ground Ground for the device. Should be connected to ground of the system.
V
DDQ
Power
Supply
Power supply for the outputs of the device. Should be connected to a 1.5V power supply
for HSTL or scaled to the desired output voltage.
6112 tbl 02b
Pin Definitions continued
