19
LTC3736
3736fa
For coincident tracking (V
OUT1
= V
OUT2
during start-up),
R2A = R
TRACKA
R2B
= R
TRACKB
The ramp time for V
OUT2
to rise from 0V to its final value
is:
tt
R
RA
RA RB
RR
SS SS
TRACKA
TRACKA TRACKB
21
1
11
=
+
+
••
For coincident tracking,
tt
V
V
SS SS
OUT F
OUT F
21
2
1
=
where V
OUT1F
and V
OUT2F
are the final, regulated values of
V
OUT1
and V
OUT2
. V
OUT1
should always be greater than
V
OUT2
when using the TRACK pin. If no tracking function
is desired, then the TRACK pin may be tied to V
IN
. How-
ever, in this situation there would be no (internal nor
external) soft-start on V
OUT2
.
Phase-Locked Loop and Frequency Synchronization
The LTC3736 has a phase-locked loop (PLL) comprised
of an internal voltage-controlled oscillator (VCO) and a
phase detector. This allows the turn-on of the external P-
channel MOSFET of controller 1 to be locked to the rising
edge of an external clock signal applied to the SYNC/FCB
pin. The turn-on of controller 2’s external P-channel
MOSFET is thus 180 degrees out of phase with the
external clock. The phase detector is an edge sensitive
digital type that provides zero degrees phase shift
between the external and internal oscillators. This type of
phase detector does not exhibit false lock to harmonics of
the external clock.
The output of the phase detector is a pair of complemen-
tary current sources that charge or discharge the external
filter network connected to the PLLLPF pin. The relation-
ship between the voltage on the PLLLPF pin and operating
frequency, when there is a clock signal applied to SYNC/
FCB, is shown in Figure 8 and specified in the Electrical
Characteristics table. Note that the LTC3736 can only be
synchronized to an external clock whose frequency is
within range of the LTC3736’s internal VCO, which is
nominally 200kHz to 1MHz. This is guaranteed, over
temperature and variations, to be between 300kHz and
750kHz. A simplified block diagram is shown in Figure 9.
APPLICATIO S I FOR ATIO
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TIME
(7b) Coincident Tracking
V
OUT1
V
OUT2
OUTPUT VOLTAGE
TIME
3736 F07b,c
(7c) Ratiometric Tracking
V
OUT1
V
OUT2
OUTPUT VOLTAGE
Figures 7b and 7c. Two Different Modes of Output Voltage Tracking
PLLLPF PIN VOLTAGE (V)
0
0
FREQUENCY (kHz)
0.5 1 1.5 2
3736 F08
2.4
200
400
600
800
1000
1200
1400
Figure 8. Relationship Between Oscillator Frequency and Voltage
at the PLLLPF Pin When Synchronizing to an External Clock
20
LTC3736
3736fa
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If the external clock frequency is greater than the internal
oscillator’s frequency, f
OSC
, then current is sourced con-
tinuously from the phase detector output, pulling up the
PLLLPF pin. When the external clock frequency is less than
f
OSC
, current is sunk continuously, pulling down the PLLLPF
pin. If the external and internal frequencies are the same
but exhibit a phase difference, the current sources turn on
for an amount of time corresponding to the phase differ-
ence. The voltage on the PLLLPF pin is adjusted until the
phase and frequency of the internal and external oscilla-
tors are identical. At the stable operating point, the phase
detector output is high impedance and the filter capacitor
C
LP
holds the voltage.
The loop filter components, C
LP
and R
LP
, smooth out the
current pulses from the phase detector and provide a
stable input to the voltage-controlled oscillator. The filter
components C
LP
and R
LP
determine how fast the loop
acquires lock. Typically R
LP
= 10k and C
LP
is 2200pF to
0.01µF.
Typically, the external clock (on SYNC/FCB pin) input high
level is 1.6V, while the input low level is 1.2V.
Table 2 summarizes the different states in which the
PLLLPF pin can be used.
Table 2
PLLLPF PIN SYNC/FCB PIN FREQUENCY
0V DC Voltage 300kHz
Floating DC Voltage 550kHz
V
IN
DC Voltage 750kHz
RC Loop Filter Clock Signal Phase-Locked to External Clock
Auxiliary Winding Control Using SYNC/FCB Pin
The SYNC/FCB can be used as an auxiliary feedback to
provide a means of regulating a flyback winding output.
When this pin drops below its ground-referenced 0.6V
threshold, continuous mode operation is forced.
During continuous mode, current flows continuously in
the transformer primary. The auxiliary winding draws
current only when the bottom, synchronous N-channel
MOSFET is on. When primary load currents are low and/or
the V
IN
/V
OUT
ratio is close to unity, the synchronous
MOSFET may not be on for a sufficient amount of time to
transfer power from the output capacitor to the auxiliary
load. Forced continuous operation will support an auxil-
iary winding as long as there is a sufficient synchronous
MOSFET duty factor. The FCB input pin removes the
requirement that power must be drawn from the trans-
former primary in order to extract power from the auxiliary
winding. With the loop in continuous mode, the auxiliary
output may nominally be loaded without regard to the
primary output load.
The auxiliary output voltage V
AUX
is normally set as shown
in Figure 10 by the turns ratio N of the transformer:
V
AUX
(N + 1) V
OUT
However, if the controller goes into Burst Mode operation
and halts switching due to a light primary load current,
then V
AUX
will droop. An external resistor divider from
V
AUX
to the FCB sets a minimum voltage V
AUX(MIN)
:
VV
R
R
AUX MIN()
.=+
06 1
6
5
DIGITAL
PHASE/
FREQUENCY
DETECTOR
OSCILLATOR
2.4V
R
LP
C
LP
3736 F09
PLLLPF
EXTERNAL
OSCILLATOR
SYNC/
FCB
Figure 9. Phase-Locked Loop Block Diagram
21
LTC3736
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If V
AUX
drops below this value, the FCB voltage forces
temporary continuous switching operation until V
AUX
is
again above its minimum.
Table 3 summarizes the different states in which the
SYNC/FCB pin can be used
Table 3
SYNC/FCB PIN CONDITION
0V to 0.5V Forced Continuous Mode
Current Reversal Allowed
0.7V to V
IN
Burst Mode Operation Enabled
No Current Reversal Allowed
Feedback Resistors Regulate an Auxiliary Winding
External Clock Signal Enable Phase-Locked Loop
(Synchronize to External CLK)
Pulse-Skipping at Light Loads
No Current Reversal Allowed
Fault Condition: Short Circuit and Current Limit
To prevent excessive heating of the bottom MOSFET,
foldback current limiting can be added to reduce the
current in proportion to the severity of the fault.
Foldback current limiting is implemented by adding di-
odes D
FB1
and D
FB2
between the output and the I
TH
pin as
shown in Figure 11. In a hard short (V
OUT
= 0V), the current
will be reduced to approximately 50% of the maximum
output current.
Low Supply Operation
Although the LTC3736 can function down to below 2.4V,
the maximum allowable output current is reduced as V
IN
decreases below 3V. Figure 12 shows the amount of
change as the supply is reduced down to 2.4V. Also shown
is the effect on V
REF
.
Minimum On-Time Considerations
Minimum on-time, t
ON(MIN)
,
is the smallest amount of time
in which the LTC3736 is capable of turning the top
P-channel MOSFET on and then off. It is determined by
internal timing delays and the gate charge required to turn
on the top MOSFET. Low duty cycle and high frequency
applications may approach the minimum on-time limit
and care should be taken to ensure that:
t
V
fV
ON MIN
OUT
OSC IN
()
<
If the duty cycle falls below what can be accommodated
by the minimum on-time, the LTC3736 will begin to skip
cycles (unless forced continuous mode is selected). The
output voltage will continue to be regulated, but the ripple
current and ripple voltage will increase. The minimum on-
time for the LTC3736 is typically about 250ns. However,
as the peak sense voltage (I
L(PEAK)
• R
DS(ON)
) decreases,
the minimum on-time gradually increases up to about
300ns. This is of particular concern in forced continuous
applications with low ripple current at light loads. If forced
+
1/2 LTC3736
V
FB
I
TH
R2
D
FB1
V
OUT
D
FB2
3736 F11
R1
Figure 11. Foldback Current Limiting
INPUT VOLTAGE (V)
75
NORMALIZED VOLTAGE OR CURRENT (%)
85
95
105
80
90
100
2.2 2.4 2.6 2.8
3736 F12
3.02.12.0 2.3 2.5 2.7 2.9
V
REF
MAXIMUM
SENSE VOLTAGE
Figure 12. Line Regulation of V
REF
and
Maximum Sense Voltage for Low Input Supply
LTC3736
+
+
R6
R5
1µF
V
OUT
V
AUX
C
OUT
L1
1:N
SYNC/FCB
BG
SW
TG
3736 F10
V
IN
Figure 10. Auxiliary Output Loop Connection

LTC3736EGN#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2-Phase Synch Controller w/ Tracking
Lifecycle:
New from this manufacturer.
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