P9038 DATASHEET
©2016 Integrated Device Technology, Inc. 10 P9038 August 1, 2016
Description of the Wireless Power Charging System
A wireless charging system is comprised of a base station
(transmitter) and a secondary coil (receiver) positioned
against each other allowing power to be transferred
magnetically. A WPC1 transmitter may be a free-positioning or
magnetically-guided type. A free-positioning type of
transmitter has an array of coils that gives limited spatial
freedom to the end-user, whereas a magnetically-guided type
of transmitter helps the end-user align the receiver to the
transmitter with a magnetic attraction.
The amount of power transferred to the Wireless charging
device is controlled by the receiver. The receiver sends
communication packets to the transmitter to increase power,
decrease power, or maintain the power level. The
communication is digital, and communication of 1's and 0's is
achieved by the Rx modulating the amount of load on the
receiver coil.
To conserve power, the transmitter places itself in a
very-low-power sleep mode unless it detects the presence of
a receiver. Once a receiver is detected, the transmitter exits
sleep mode and begins the power transfer per the WPC
specification.
Input Capacitors
Improper selection of the decoupling capacitor will degrade
the electrical performance of the P9038. The REG_IN and
IN_A to IN_D are the supply rails with nominal operating range
of 4.5V to 6.9V powering the internal drivers and the full bridge
inverter, respectively. At full load, the current through these
pins are both high and fast switching.
Typically, three 10µF and one 0.1µF ceramic capacitor across
the IN_A to IN_D pins are recommended. Similarly, for
REG_IN, a 1µF in parallel with 0.1µF capacitors are sufficient.
Prior to selecting the capacitor, always examine the
capacitor's DC voltage coefficient characteristics as the value
of the capacitors will decrease due to capacitance-to-applied
voltage characteristics of the commonly-used ceramic
dielectrics. For example, a 22µF X7R 6.3V capacitor's value
can actually be 6µF when operating at 5V, depending on the
manufacturer. Typically, 10V- or 16V-rated capacitors are
required. It is typically best to select these capacitors with a
voltage rating from two to two and half times the expected
applied voltage.
For optimum device performance, the decoupling capacitors
must be mounted on the component side of the PCB, and
also, located as physically close as possible to the related
power pins and power ground (PGND).
LDO5V & LDO2P5V
The LDO5V and LDO2P5V are 5V and 2.5V linear regulators
designed to power the internal circuitry. They can support
maximum of 10mA and 5mA of load current, respectively. To
stabilize the regulators, a 1µF capacitor from the output pin to
GND must be connected.
The GATE pin and associated MOSFET shown in Figure 2
below provide protection to the P9038 from input over-voltage
events and control current inrush. Both of these features are
described in subsequent sections of this document.
Figure 2. Input Voltage Support Range (UVLO)
Full-bridge MOSFET Drive and MOSFET
Current Sense
The P9038 incorporates an integrated full-bridge inverter.
Each half-bridge contains a high-side current sense block that
is used for control and for peak current protection. For EMI
reduction purposes, the switching rising and falling rates of the
internal MOSFETs are controlled.
Input Over-voltage Protection and In-rush
Control
The P9038 offers additional protection in the event of input
voltage transients and the programmable soft start time to
minimize the inrush currents. The P9038 is powered from a
VBUS input which may be subjected to voltages above 5.5V
under normal operation. The P9038 is designed to support
voltages as high as 27 V on this input. An external OVP
MOSFET is used to isolate pins that would be damaged by a
27 V transient on the V
BUS
input. The OVP MOSFET has a
second function: limiting inrush current from the V
BUS
line
during startup. This is necessary due to the USB inrush
specification and the large total effective capacitance (~40µF)
on the REG_IN and IN pins of the IC.
P9038
REG_IN
C
REG_IN
LDO5V
C
LDO5V
GATE
VBUS_SNS
ADAPTOR
4.5 V Min
25 m
To Inverter
IDC = 1.5 A
4.5 V - 25 m
* 1.5 A =
4.46 V
5
To IC
IDC = 45 mA
For Demonstration Purposes Only
Not All Connections Shown
Not To Scale
4.46 V – 5 * 45 mA = 4.23 V
LDO2P5V_IN
LDO2P5V
LDO2P5V
UVLO
BAND
GAP
LDO5V
INVERTER
& MCU
P9038 DATASHEET
P9038 August 1, 2016 11 ©2016 Integrated Device Technology, Inc.
The P9038 monitors the VBUS_SNS pin for over-voltage
conditions and shuts off the OVP MOSFET to implement
over-voltage protection. This OVP threshold can be
configured via a single pin as shown in Tabl e 6.
Table 6: V
BUS
OVP Threshold Selection
A secondary over voltage protection with a 9.5V threshold is
implemented on REG_IN for cases where the OVP MOSFET
is not used. If the REG_IN threshold is exceeded, the P9038
is disabled until the REG_IN voltage drops below 8V.
Demodulation
Power transfer from the P9038 to a WPC-compliant wireless
power receiver, such as P9025AC-R, is controlled by the
receiver. Communication packets are superimposed on the
power link between the two devices, and are demodulated by
the P9038. Further information about the WPC
communication protocol can be found at the WPC website.
Communication can be made more robust by running traces
from Shield1 and Shield2 along both sides of the HPF trace.
Analog-to-Digital Converter [ADC]
The ADC is the main functional block which the MCU uses for
IC operation, including Foreign Object Detection. The ADC
also digitizes several internal and external voltages and
currents for overall system control and improved
demodulation functionality.
USB DP/DM Functionality
The P9038 implements USB D+/D- detection derived from the
BCS1.2 specification. This determines whether the USB
power source is a Standard Port (such as from a computer) or
a dedicated USB power supply Charger Port. When a Charger
Port is detected, the P9038 will set its GPIO-5 pin to a
logic-high state to indicate power is from a Charger Port. This
information may be used for any purpose, but has no direct
effect on the actual operation of the P9038.
Operation of the P9038 follows the commonly accepted
practice in wireless charging to draw as much power as the
source will allow. A Charger Port will provide its rated output,
which is usually greater than the normal 500mA limit that
could be typically expected from a Standard Port.
Foreign Object Detection and Input
Over-current Protection
The P9038 makes precision measurements of the input
voltage and input current, which are sampled by the internal
ADC and processed in firmware for WPC 1.2.2 Foreign Object
Detection [FOD] compliance. Two external pins, ISNS_AVG
and VSNS_AVG, are provided for filtering the input current
sense and input voltage sense signals respectively.
The input current sense signal is generated differentially from
the ISNSP_IN and ISNSN_IN pins. This input current sense
signal is filtered by an internal 50k output resistor combined
with an external capacitor on the ISNS_AVG pin.
Input voltage measurements are also filtered by an internal
33k output resistor on the VSNS_AVG pin combined with an
external capacitor on the VSNS_AVG pin. It is recommended
to follow approximately the filter time constants used on the
VSNS_AVG and ISNS_AVG signals as shown in the
reference design to insure time alignment of the resulting
measurements and accurate power calculation for FOD and
other purposes.
External Chip Reset and EN
The P9038 can be externally reset by pulling the RESET pin
to a logic high (above the V
IH
level).
The RESET pin is a dedicated high-impedance active-high
digital input, and its effect is similar to the automatic power-up
reset function. Because of the internal low voltage monitoring/
reset scheme, the use of the external RESET pin is not
mandatory. When RESET is HIGH, the micro-controller's
registers are set to the default configuration. When the
RESET pin is released to a LOW, the micro-controller starts
loading and executing the firmware from the program memory.
If the particular application requires the P9038 to be disabled,
this can be accomplished with the EN
pin.
When the EN
pin is pulled high, the device is shuts off and
placed in a very low current condition.When EN
is connected
to logic LOW, the device will become active, and the
micro-controller starts loading and executing the firmware
from the program memory.
The current into EN
is approximately equal to:
or close to zero if V
(EN)
is less than 2V.
OVP_SEL Pin Connection OVP threshold
220k to ground 6.3V
Grounded 7.15V
Floating 7.85V
P9038 DATASHEET
©2016 Integrated Device Technology, Inc. 12 P9038 August 1, 2016
System Overview
For complete details of the WPC wireless power systems,
refer to the WPC specifications and other materials at
http://www.wirelesspowerconsortium.com.
The P9038 requires a minimum number of external
components for proper operation. The provided reference
design schematic and Bill-of-Materials component list enable
a fully WPC "Qi Compliant" system. In addition to providing
required LED indications, this system also provides optional
buzzer indications (that could be used with an external
piezoelectric buzzer device), and an thermistor
over-temperature limit function and optional buzzer
indications that are available to drive an external
piezeoelectric buzzer device.
I
2
C Communication
The P9038 includes an I
2
C block which can support either I
2
C
Master or I
2
C Slave operation. After power-on-reset (POR),
the P9038 will initially acts as an I
2
C Master for the purpose of
downloading firmware from an external memory device, such
as an EEPROM. The I
2
C Master mode on the P9038 does not
support multi-master mode, and it is important for system
designers to avoid any bus master conflict until the P9038 has
finished any firmware uploading and has released control of
the bus as I
2
C Master. After firmware downloaded from
external memory is complete, and when the P9038 begins
normal operation, the P9038 is configured by the standard
firmware to be exclusively in I
2
C Slave mode.
For maximum flexibility, the P9038 tries to communicate with
the first address on the EEPROM at 300kHz. If no
acknowledge bit (ACK) is received, communication is
attempted at the other addresses at 100kHz. If no EEPROM
is present in the system, the P9038 will attempt to execute
firmware from its internal ROM memory.
EEPROM
The P9038 EVK supports an external EEPROM memory chip,
pre-programmed with a standard operating firmware that is
automatically loaded when 5V power is applied. The P9038
uses I
2
C master address 0x52 to access the EEPROM. The
P9038 slave address is 0x39.
If the standard firmware is not suitable for the application,
custom EEPROM or internal factory programmed ROM
configurations are possible. Please contact IDT Sales for
more information regarding non-standard solution options.
Overview of Standard GPIO Usage
There are 7 GPIO's on the P9038 transmitter IC. All GPIOs
are configured as inputs during the power-on startup process.
Firmware will then reconfigure the GPIO as follows:
GPIO-0: This pin is not used in the standard firmware and
is configured as active-low output during normal operation.
GPIO-1: This pin is used to dynamically manage the
optimum configuration of the external communication
demodulation circuit.
GPIO-2: This pin is connected to an external thermistor
circuit which is used by P9038 to determine an external
over-temperature condition
GPIO-3: During power-on, this pin is sampled by the
internal ADC to determine the resistor option setting for the
LED mode. In normal operation, this pin is configured as an
output to drive the Green LED indication functions (see
Table 10).
GPIO-4: During power-on, this pin is sampled by the
internal ADC to determine the resistor option setting for
adjusting the FOD offset value. In normal operation, this pin
is configured as an output to drive the optional external
piezoelectric buzzer function.
GPIO-5: This pin is configured as an output to indicate the
result of the USB D+/D- port type detection. If the USB port
type is a Charger Port, then the output will be set to
active-high. Otherwise, the output is set to active-low
GPIO-6: This pin is configured as an output to drive the
Red LED functions (see Tabl e 7 ).
Tab le 7 lists how the red and green LEDs can be used to
display information about the P9038's operating modes. This
table also specifies how to configure the GPIO-3 optioning
resistors to select the desired LED mode.

P9038-RNDGI

Mfr. #:
Manufacturer:
IDT
Description:
Wireless Charging ICs Sgl Chip WPC 1.1 5V Tx-A5 Tx-A11 8W
Lifecycle:
New from this manufacturer.
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