P9038 DATASHEET
P9038 August 1, 2016 7 ©2016 Integrated Device Technology, Inc.
Pin Configuration
Pin Descriptions
Pin # Name Type Function
1 GND I Signal Ground Connection.
2 NC Do not connect. Internally connected.
3 GPIO6 I/O General Purpose Input/Output.
4 GPIO5 I/O General Purpose Input/Output.
5 GPIO4 I/O General Purpose Input/Output.
6 GPIO3 I/O General Purpose Input/Output.
7 GPIO2 I/O General Purpose Input/Output.
8 GPIO1 I/O General Purpose Input/Output.
9 GPIO0 I/O General Purpose Input/Output.
10 SCL I I
2
C Clock.
11 SDA I/O I
2
C Data.
12 DP I/O USB Data Positive Input. If not used, the pin can be floating.
13 DM I/O USB Data Negative Input. If not used, the pin can be floating.
14 RESET I Active-high Reset Pin. Connect a 47K to GND or tie directly to GND if not used.
15 VBUS_SNS I VBUS OVP sense point & provides bias for OVP circuitry.
GPIO6
NC
GND
GND
SW1
BST1
PGND1
EN
REFGND
REG_IN
LDO2P5V_IN
LDO2P5V
IN
IN
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
SCL
SDA
RESET
VSNS_AVG
ISNS_AVG
PGND1
PGND1
DP
DM
LDO5V
ISNSP_IN
ISNSN_IN
GATE
PGND1
SW1
SW1
SW1
IN
IN
SW2
SW2
SW2
SW2
PGND2
PGND2
PGND2
BST2
PGND2
4
3
2
1
5
6
7
8
9
10
11
12
13
14
18171615 19 20 21 22 23 24 25 26 27 28
53545556 52 51 50 49 48 47 46 45 44 43
39
40
41
42
38
37
36
35
34
33
32
31
30
29
ISNS
GND
HPF
SHIELD2
SHIELD1
VBUS_SNS
INV5V_IN
OVP_SEL
EPAD
P9038 DATASHEET
©2016 Integrated Device Technology, Inc. 8 P9038 August 1, 2016
16 EN
I Active-low Enable Pin. Connect a 47K to GND or tie directly to GND if chip is always enabled.
17 REFGND PWR Signal Ground Connection. Connect to AGND.
18 REG_IN I Input Voltage for the internal 5V linear regulator. Connect a 1µF capacitor from this pin to GND.
19 LDO5V O 5V LDO Output. Connect a 1µF Capacitor from this pin to GND.
20 LOD2P5V O 2.5V LDO Output. Connect a 1µF Capacitor from this pin to GND.
21 LDO2P5_IN PWR Input Voltage for the internal 2.5V linear regulator. This pin must be connected to LDO5V (pin 19).
22 INV5V_IN PWR Input power to the internal driver circuitry. Connect a 1µF capacitor from this pin to GND.
23 OVP_SEL I Input over-voltage protection selection. When connected to GND, the nominal OVP threshold is set
to 7.15V. When floating, 7.85V. Connecting the pin through a 220K resistor to GND sets the OVP
to 6.3V.
24 VSNS_AVG I Input voltage sense averaging pin. Connect a 6.8nF capacitor from this pin to AGND.
25 BST2 I Bootstrap pin for SW2 Bridge Node. Connect a 0.1uF capacitor from this pin to SW2 pin.
26,27,28,29 PGND2 GND Power Ground.
30,31,32,33 SW2 O H-Bridge Switch Node 2.
34,35,36,37 IN I Power Supply Input Voltage. Connect two 22µF capacitors from the pins to GND.
38,39,40,41 SW1 O H-Bridge Switch Node 1.
42,43,44,45 PGND1 GND Power Ground.
46 BST1 I Bootstrap pin for SW1 Bridge Node. Connect a 0.1uF capacitor from this pin to SW1 pin.
47 GATE O Output gate driver for the external FET. Connect a 6.8nF capacitor in parallel with 10M from this
pin to GND to configure soft-start.
48 ISNS_AVG I Input current sense averaging pin. Connect a 1nF capacitor from this pin to AGND.
49 ISNSN_IN I Input Current Sense amplifier inverting Input.
50 ISNSP_IN I Input Current Sense amplifier non-inverting Input.
51 SHIELD1 O Shield output to guard DC voltage on HPF pin. Connect a 10M resistor to GND.
52 HPF I High Pass Filter Input for Demodulator. Connect to an external high pass filter.
53 SHIELD2 O Shield output to guard DC voltage on HPF pin. Leave this pin floating.
54 GND I Signal Ground Connection.
55 ISNS O Coil current sense output, connected to external demodulation circuit.
56 GND I Signal Ground Connection.
EP EP GND Exposed Pad. Connect to GND.
Pin # Name Type Function
P9038 DATASHEET
P9038 August 1, 2016 9 ©2016 Integrated Device Technology, Inc.
Block Diagram
Foreign Object Detection
VBUS_SNS
GATE
OVP_SEL
DIGITAL
LDO2P5V
REG_IN
LDO5V
SW1
SW2
BST2
BST1
PGND1
IN
PGND2
SCL
SDA
RESET
EPAD
REFGND
HPF
ISNS
DP
DM
RAM ROM
INV5V_IN
SHIELD1
GPIO[6:0]
SHIELD2
ISNSP_IN
ISNSN_IN
ISNS_AVG
VBUS OVP
& Inrush
Control
VSNS_AVG
MCU
ADC & Telemetry
Demodulator
&
Communication
Bias & Reference
Generators
GPIO
USB
DPDM
I/O
I
2
C
I/O
Full Bridge
Inverter
EN

P9038-RNDGI

Mfr. #:
Manufacturer:
IDT
Description:
Wireless Charging ICs Sgl Chip WPC 1.1 5V Tx-A5 Tx-A11 8W
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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