LTC4290/LTC4271
18
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AUTO pin mode operates the same as semi-auto mode
except it will automatically turn on the power to the port if
detection is successful. AUTO pin mode will autonomously
set the I
CUT
and I
LIM
values based on the class result. This
operational mode is only valid if the AUTO pin is high at
reset or power-up and remains high during operation.
In shutdown mode, the port is disabled and will not detect
or power a PD.
Regardless of which mode it is in, the LTC4290/LTC4271
will remove power automatically from any port that gener-
ates a current limit fault. It will also automatically remove
power from any port that generates a disconnect event if
disconnect detection is enabled. The host controller may
also command the port to remove power at any time.
Reset and the AUTO/MID Pins
The initial LTC4290/LTC4271 configuration depends on
the state of the AUTO and MID pins during reset. Reset
occurs at power-up, or whenever the RESET pin is pulled
low or the global Reset All bit is set. Changing the state of
AUTO or MID after power-up will not properly change the
port behavior of the LTC4290/LTC4271 until a reset occurs.
Although typically used with a host controller, the LTC4290/
LTC4271 can also be used in a standalone mode with no
connection to the serial interface. If there is no host pres-
ent, the AUTO pin must be tied high so that, at reset, all
ports will be configured to operate automatically. Each port
will detect and classify repeatedly until a PD is discovered,
set I
CUT
and I
LIM
according to the classification results,
apply power to valid PDs, and remove power when a PD
is disconnected.
Table 3 shows the I
CUT
and I
LIM
values that will be auto-
matically set in standalone (AUTO pin) mode, based on
the discovered class.
Table 3. I
CUT
and I
LIM
Values in Standalone Mode
CLASS I
CUT
I
LIM
Class 1 112mA 425mA
Class 2 206mA 425mA
Class 3 or 0 375mA 425mA
Class 4 638mA 850mA
APPLICATIONS INFORMATION
Figure 11. IEEE 802.3af Signature Resistance Ranges
The automatic setting of I
CUT
and I
LIM
values only occurs
if the LTC4290/LTC4271 is reset with the AUTO pin high.
If the standalone application is a midspan, the MID pin must
be tied high to enable correct midspan detection timing.
DETECTION
Detection Overview
To avoid damaging network devices that were not designed
to tolerate DC voltage, a PSE must determine whether the
connected device is a real PD before applying power. The
IEEE specification requires that a valid PD have a common-
mode resistance of 25k ±5% at any port voltage below
10V. The PSE must accept resistances that fall between
19k and 26.5k, and it must reject resistances above 33k
or below 15k (shaded regions in Figure 11). The PSE may
choose to accept or reject resistances in the undefined
areas between the must-accept and must-reject ranges. In
particular, the PSE must reject standard computer network
ports, many of which have 150Ω common-mode termina-
tion resistors that will be damaged if power is applied to
them (the black region at the left of Figure 11).
RESISTANCE
PD
PSE
0Ω 10k
15k
429071 F11
19k 26.5k
26.25k23.75k
150Ω (NIC)
20k 30k
33k
4-Point Detection
The LTC4290/LTC4271 uses a 4-point detection method to
discover PDs. False-positive detections are minimized by
checking for signature resistance with both forced-current
and forced-voltage measurements.
Initially, two test currents are forced onto the port (via the
OUTn pin) and the resulting voltages are measured. The
detection circuitry subtracts the two V-I points to determine
the resistive slope while removing offset caused by series
diodes or leakage at the port (see Figure 12). If the forced-
current detection yields a valid signature resistance, two
test voltages are then forced onto the port and the result-
ing currents are measured and subtracted. Both methods
