Exar
Corporation 48720 Kato Road, Fremont CA, 94538
(510) 668-7000
FAX (510) 668-7017
www.exar.com
XRA1202/1202P
8-BIT I2C/SMBUS GPIO EXPANDER WITH RESET
APRIL 2013 REV. 1.0.1
GENERAL DESCRIPTION
The XRA1202/1202P is an 8-bit GPIO expander with
an I
2
C/SMBus interface. After power-up, the
XRA1202 has internal 100K ohm pull-up resistors on
each I/O pin that can be individually enabled. The
XRA1202P has the internal pull-up resistors enabled
upon power-up in case it is necessary for the inputs
to be in a known state.
In addition, the GPIOs on the XRA1202/1202P can
individually be controlled and configured. As outputs,
the GPIOs can be outputs that are high, low or in
three-state mode. The three-state mode feature is
useful for applications where the power is removed
from the remote devices, but they may still be
connected to the GPIO expander.
As inputs, the internal pull-up resistors can be
enabled or disabled and the input polarity can be
inverted. The interrupt can be programmed for
different behaviors. The interrupts can be
programmed to generate an interrupt on the rising
edge, falling edge or on both edges. The interrupt
can be cleared if the input changes back to its original
state or by reading the current state of the inputs.
The XRA1202/1202P are enhanced versions of the
PCA9538. The XRA1202 is pin and software
compatible with the PCA9538 (note: software
registers are compatible to the PCA9538, but the I
2
C
slave address is different).
The XRA1202 is available in 16-pin QFN and 16-pin
TSSOP packages. The XRA1202P is available in the
16-pin QFN package.
FEATURES
1.65V to 3.6V operating voltage
8 General Purpose I/Os (GPIOs)
5V tolerant inputs
Maximum stand-by current of 1uA at +1.8V
I
2
C/SMBus bus interface
I
2
C clock frequency up to 400kHz
Noise filter on SDA and SCL inputs
Up to 16 I
2
C Slave Addresses
Individually programmable inputs
Internal pull-up resistors
Polarity inversion
Individual interrupt enable
Rising edge and/or Falling edge interrupt
Input filter
Individually programmable outputs
Output Level Control
Output Three-State Control
Open-drain active low interrupt output
Active-low reset input
Pin and software compatible with PCA9538
3kV HBM ESD protection per JESD22-A114F
200mA latch-up performance per JESD78B
APPLICATIONS
Personal Digital Assistants (PDA)
Cellular Phones/Data Devices
Battery-Operated Devices
Global Positioning System (GPS)
Bluetooth
XRA1202/1202P
2
8-BIT I2C/SMBUS GPIO EXPANDER WITH RESET
REV. 1.0.1
N
OTE
: TR = Tape and Reel, F = Green / RoHS
F
IGURE
1. XRA1202/1202P B
LOCK
D
IAGRAM
ORDERING INFORMATION
P
ART
N
UMBER
P
ACKAGE
N
UMBER
O
F
GPIO
S
O
PERATING
T
EMPERATURE
R
ANGE
D
EVICE
S
TATUS
XRA1202IL16-F QFN-16 8 -40°C to +85°C Active
XRA1202IL16TR-F QFN-16 8 -40°C to +85°C Active
XRA1202PIL16-F QFN-16 8 -40°C to +85°C Active
XRA1202PIL16TR-F QFN-16 8 -40°C to +85°C Active
XRA1202IG16-F TSSOP-16 8 -40°C to +85°C Active
XRA1202IG16TR-F TSSOP-16 8 -40°C to +85°C Active
F
IGURE
2. P
IN
O
UT
A
SSIGNMENTS
I
2
C/
SMBus
Interface
A1
A0
SCL
SDA
GPIO
Control
Registers
RESET#
IRQ#
P0
GPIOs
P1
P2
P3
P4
P5
P6
P7
VCC (1.65V 3.6V)
GND
XRA1202
16-Pin TSSOP
3
5
4
7
6
8
1
2
A0
A1
RESET#
P0
P1
P2
P3
GND 9
10
11
12
13
14
15
16 VCC
SDA
SCL
IRQ#
P7
P6
P5
P4
XRA1202/
XRA1202P
16-Pin QFN
P1
P2
P0
RESET#
GND
P3
P4
P5
A0
A1
VCC
SDA
P7
P6
IRQ#
SCL
16 15 14 13
5 6 7 8
2
1
3
4
11
12
10
9
XRA1202/1202P
3
REV. 1.0.1
8-BIT I2C/SMBUS GPIO EXPANDER WITH RESET
PIN DESCRIPTIONS
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
Pin Description
N
AME
QFN-16
P
IN
#
TSSOP-16
P
IN
#
T
YPE
D
ESCRIPTION
I
2
C INTERFACE
SDA 13 15 I/O
I
2
C-bus data input/output (open-drain).
SCL 12 14 I
I
2
C-bus serial input clock.
IRQ# 11 13 OD
Interrupt output (open-drain, active LOW).
A0
A1
15
16
1
2
I
I
These pins select the I
2
C slave address. See
Table 1
.
RESET# 1 3 I
Reset (active LOW) - A longer than 40 ns LOW pulse on this pin will reset the
internal registers and all GPIOs will be configured as inputs.
GPIOs
P0
P1
P2
P3
P4
P5
P6
P7
2
3
4
5
7
8
9
10
4
5
6
7
9
10
11
12
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
General purpose I/Os P0-P7. All GPIOs are configured as inputs upon power-
up or after a reset. After power-up or reset, the internal pull-up resistors are
enabled for the XRA1202P. After power-up or reset, the internal pull-up resis-
tors are disabled for the XRA1202.
ANCILLARY SIGNALS
VCC 14 16 Pwr
1.65V to 3.6V VCC supply voltage.
GND 6 8 Pwr
Power supply common, ground.
GND Center
Pad
- Pwr
The exposed pad at the bottom surface of the package is designed for thermal
performance. Use of a center pad on the PCB is strongly recommended for ther-
mal conductivity as well as to provide mechanical stability of the package on the
PCB. The center pad is recommended to be solder masked defined with open-
ing size less than or equal to the exposed thermal pad on the package bottom to
prevent solder bridging to the outer leads of the device. Thermal vias must be
connected to GND plane as the thermal pad of package is at GND potential.

XRA1202PIL16-F

Mfr. #:
Manufacturer:
MaxLinear
Description:
Interface - I/O Expanders XRA1202PIL16-F
Lifecycle:
New from this manufacturer.
Delivery:
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