FEMTOCLOCK® LVCMOS/CRYSTAL-TO-3.3V, 2.5V LVPECL
FREQUENCY SYNTHESIZER
7 Rev B 12/9/14
843004I DATA SHEET
Typical Phase Noise at 212.5MHz at 3.3V
Fibre Channel Filter
Phase Noise Result by adding a
Fibre Channel filter to raw data
Raw Phase Noise Data
212.5MHz
RMS Phase Jitter (Random)
2.55MHz to 20MHz = 0.47ps (typical)
Noise Power dBc
Hz
Offset Frequency (Hz)
Rev B 12/9/14 8 FEMTOCLOCK® LVCMOS/CRYSTAL-TO-3.3V, 2.5V LVPECL
FREQUENCY SYNTHESIZER
843004I DATA SHEET
Parameter Measurement Information
3.3V Core/ 3.3V Output Load AC Test Circuit
Output Skew
Output Duty Cycle/Pulse Width/Period
2.5V Core/ 2.5V Output Load AC Test Circuit
RMS Phase Jitter
Output Rise/Fall Time
-
SCOPE
Qx
nQx
V
EE
V
CC,
2V
-1.3V ± 0.165V
V
CCA,
V
CCO
nQx
Qx
nQy
Qy
nQ[0:3]
Q[0:3]
-
SCOPE
Qx
nQx
V
EE
V
CC,
2V
-0.5V ± 0.125V
V
CCA,
V
CCO
nQ[0:3]
Q[0:3]
FEMTOCLOCK® LVCMOS/CRYSTAL-TO-3.3V, 2.5V LVPECL
FREQUENCY SYNTHESIZER
9 Rev B 12/9/14
843004I DATA SHEET
Application Information
Power Supply Filtering Technique
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter performance,
power supply isolation is required. The 843004I provides separate
power supplies to isolate any high switching noise from the outputs
to the internal PLL. V
CC,
V
CCA
and V
CCO
should be individually
connected to the power supply plane through vias, and 0.01µF
bypass capacitors should be used for each pin. Figure 1 illustrates
this for a generic V
CC
pin and also shows that V
CCA
requires that an
additional 10 resistor along with a 10F bypass capacitor be
connected to the V
CCA
pin.
Figure 1. Power Supply Filtering
Recommendations for Unused Input and Output Pins
Inputs:
Crystal Inputs
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1k resistor can be tied from
XTAL_IN to ground.
TEST_CLK Input
For applications not requiring the use of the clock, it can be left
floating. Though not required, but for additional protection, a 1k
resistor can be tied from the TEST_CLK to ground.
LVCMOS Control Pins
All control pins have internal pulldowns; additional resistance is not
required but can be added for additional protection. A 1k resistor
can be used.
Outputs:
LVPECL Outputs
All unused LVPECL outputs can be left floating. We recommend that
there is no trace attached. Both sides of the differential output pair
should either be left floating or terminated.
V
CC
V
CCA
3.3V or 2.5V
10Ω
10µF.01µF
.01µF

843004AGILF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner 4 LVPECL OUT SYNTHESIZER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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