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CS8406-DSZR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39
Copyright Cirrus Logic, Inc. 2012
(All Rights Reserved)
http://www.cirrus.com
192 kHz Digital Audio Interface Transmitter
Features
Complete EIAJ CP1201, IEC-60958, AES3,
S/PDIF-compatible Transmitter
+3.3 V or 5.0 V Digital Supply (VD)
+3.3 V or 5.0 V Digital Interface (VL)
On-Chip Channel Status and User Bit Buffer
Memories Allow Block-Sized Updates
Flexible 3-Wire Serial Digital Audio Input Port
Up to 192-kHz Frame Rate
Microcontroller Write Access to Channel Status
and User Bit Data
On-Chip Differential Line Driver
Generates CRC Codes and Parity Bits
Stand-Alone Mode Allows Use without a
Microcontroller
General Description
The CS8406 is a monolithic CMOS device which en-
codes and transmits audio data according to the AES3,
IEC60958, S/PDIF, o r EIAJ CP1201 standards. The
CS8406 accepts aud io and digital data, which is then
multiplexed, encoded, and driven onto a cable.
The audio data is input through a configurable, 3-wire
input port. The channel status and user bit data are in-
put through an SPI™ or I²C
®
microcontroller port, and
may be assembled in block-sized buffers. For systems
with no microcontroller, a Stand-Alone Mode allows di-
rect access to channel status and user bit data pins.
The CS8406 is available in a 28-pin TSSOP and SOIC
package for both Co mmercial (-10º to +70ºC) and
Automotive grade (-40º to +85ºC). The CDB8416
Demonstration board is also available for device
evaluation and implementation suggestions. Please
refer to “Ordering Information” on page 34 for complete
details.
Target applications include A/V Receivers, CD-R, DVD
receivers, digital mixin g consoles, effects processors,
set-top boxes, and computer and automotive audio
systems.
RXP
ILRCK
ISCLK
SDIN
TXP
TXN
RST OMCK
USDA/
CDOUT
SCL/
CCLK
AD1/
CDIN
AD0/
CS
INT
VL
GND
AD2H/S
VD
TCBL
Misc.
Control
Serial
Audio
Input
C or U Data Buffer
Control Port &
Registers
AES3
S/PDIF
Encoder
Output Clock
Generator
Driver
AUG '12
DS580F6
CS8406
2 DS580F6
CS8406
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ..................................................................................... 4
SPECIFIED OPERATING CONDITIONS .............................................................................................. 4
ABSOLUTE MAXIMUM RATINGS ........................................................................................................4
DC ELECTRICAL CHARACTERISTICS ............................................................................................... 4
DIGITAL INPUT CHARACTERISTICS .................................................................................................. 5
DIGITAL INTERFACE SPECIFICATIONS ............................................................................................ 5
TRANSMITTER CHARACTERISTICS .................................................................................................. 5
SWITCHING CHARACTERISTICS .......................................................................................................5
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS ............................................................. 6
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI MODE................................................... 7
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C MODE.................................................... 8
2. TYPICAL CONNECTION DIAGRAMS .................................................................................................. 9
3. GENERAL DESCRIPTION .................................................................................................................. 11
3.1 AES3 and S/PDIF Standards Documents .................................................................................... 11
4. THREE-WIRE SERIAL INPUT AUDIO PORT ..................................................................................... 12
5. AES3 TRANSMITTER ......................................................................................................................... 13
5.1 TXN and TXP Drivers ................................................................................................................... 13
5.2 Mono Mode Operation .................................................................................................................. 13
5.3 Transmitted Frame and Channel Status Boundary Timing ........................................................... 13
6. CONTROL PORT DESCRIPTION ....................................................................................................... 16
6.1 SPI Mode ...................................................................................................................................... 16
6.2 I²C Mode ....................................................................................................................................... 17
7. CONTROL PORT REGISTER SUMMARY ......................................................................................... 18
8. CONTROL PORT REGISTER BIT DEFINITIONS .............................................................................. 19
8.1 Memory Address Pointer (MAP) ................................................................................................... 19
8.2 Default = ‘000000’Control 1 (01h) ................................................................................................. 19
8.3 Control 2 (02h) .............................................................................................................................. 19
8.4 Data Flow Control (03h) ............................................................................................................... 20
8.5 Clock Source Control (04h) .......................................................................................................... 20
8.6 Serial Audio Input Port Data Format (05h) ................................................................................... 21
8.7 Interrupt 1 Status (07h) (Read Only) ............................................................................................ 22
8.8 Interrupt 2 Status (08h) (Read Only) ............................................................................................ 22
8.9 Interrupt 1 Mask (09h) .................................................................................................................. 22
8.10 Interrupt 1 Mode MSB (0Ah) and Interrupt 1 Mode LSB (0Bh) ................................................... 23
8.11 Interrupt 2 Mask (0Ch) ................................................................................................................ 23
8.12 Interrupt 2 Mode MSB (0Dh) and Interrupt Mode 2 LSB (0Eh) .................................................. 23
8.13 Channel Status Data Buffer Control (12h) ..................................................................................23
8.14 User Data Buffer Control (13h) ................................................................................................... 24
8.15 Channel Status Bit or User Bit Data Buffer (20h - 37h) .............................................................. 24
8.16 CS8406 I.D. and Version Register (7Fh) (Read Only) ................................................................ 24
9. PIN DESCRIPTION - SOFTWARE MODE ....................................................................................... 25
10. HARDWARE MODE .......................................................................................................................... 27
10.1 Channel Status, User and Validity Data ..................................................................................... 27
10.2 Serial Audio Port ......................................................................................................................... 28
11. PIN DESCRIPTION - HARDWARE MODE ....................................................................................... 29
12. APPLICATIONS ................................................................................................................................ 31
12.1 Reset, Power Down and Start-Up ...........................................................................................
... 31
12.
2
ID Code and Revision Code ....................................................................................................... 31
12.3 Power Supply, Grounding, and PCB layout ................................................................................ 31
12.4 Synchronization of Multiple CS8406s ......................................................................................... 31
13. PACKAGE DIMENSIONS ................................................................................................................ 32
14. ORDERING INFORMATION ............................................................................................................. 34
DS580F6 3
CS8406
15. APPENDIX A: EXTERNAL AES3/SPDIF/IEC60958 TRANSMITTER COMPONENTS ................... 35
15.1 AES3 Transmitter External Components .................................................................................... 35
15.2 Isolating Transformer Requirements .......................................................................................... 35
16. APPENDIX B: CHANNEL STATUS AND USER DATA BUFFER MANAGEMENT ........................ 36
16.1 AES3 Channel Status(C) Bit Management ................................................................................. 36
16.1.1 Accessing the E buffer ................................................................................................... 36
16.1.2 Serial Copy Management System (SCMS) .................................................................... 37
16.1.3 Channel Status Data E Buffer Access ........................................................................... 37
16.2 AES3 User (U) Bit Management ................................................................................................. 38
16.2.1 Mode 1: Transmit All Zeros ............................................................................................ 38
16.2.2 Mode 2: Block Mode ......................................................................................................38
17. REVISION HISTORY ......................................................................................................................... 39
LIST OF FIGURES
Figure 1. Audio Port Master Mode Timing ................................................................................................... 6
Figure 2. Audio Port Slave Mode and Data Input Timing............................................................................. 6
Figure 3. SPI Mode Timing .......................................................................................................................... 7
Figure 4. I²C Mode Timing ........................................................................................................................... 8
Figure 5. Recommended Connection Diagram for Software Mode ............................................................. 9
Figure 6. Recommended Connection Diagram for Hardware Mode .......................................................... 10
Figure 7. Serial Audio Input Example Formats .......................................................................................... 12
Figure 8. AES3 Transmitter Timing for C, U, and V Pin Input Data, Stereo Mode..................................... 14
Figure 9. AES3 Transmitter Timing for C, U, and V Pin Input Data, Mono Mode ...................................... 15
Figure 10. Control Port Timing in SPI Mode .............................................................................................. 16
Figure 11. Control Port Timing, I²C Slave Mode Write............................................................................... 17
Figure 12. Control Port Timing, I²C Slave Mode Read............................................................................... 17
Figure 13. Hardware Mode Data Flow ....................................................................................................... 27
Figure 14. Professional Output Circuit ....................................................................................................... 35
Figure 15. Consumer Output Circuit (VL = 5.0 V) ...................................................................................... 35
Figure 16. TTL/CMOS Output Circuit......................................................................................................... 35
Figure 17. Channel Status Data Buffer Structure....................................................................................... 36
Figure 18. Flowchart for Writing the E Buffer ............................................................................................. 37
LIST OF TABLES
Table 1. Control Register Map Summary................................................................................................... 18
Table 2. Hardware Mode COPY/C and ORIG Pin Functions..................................................................... 28
Table 3. Hardware Mode Serial Audio Port Format Selection ................................................................... 28
Table 4. Hardware Mode OMCK Clock Ratio Selection............................................................................. 28
Table 5. Equivalent Register Settings of Serial Audio Input Formats in Hardware Mode .......................... 28
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39

CS8406-DSZR

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Buy CS8406-DSZR
Manufacturer:
Cirrus Logic
Description:
Audio Transmitters, Receivers, Transceivers IC 192 kHz Digital Audio Transmitter
Lifecycle:
New from this manufacturer.
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