SSM2804
Rev. 0 | Page 12 of 36
100
10
1
0.1
0.01
0.001
0.0001 10
THD + N (%)
OUTPUT POWER (W)
0.001 0.01 0.1 1
R
L
= 32
09960-024
100
10
1
0.1
0.01
0.001
0.0001 10
THD + N (%)
OUTPUT POWER (W)
0.001 0.01 0.1 1
R
L
= 16
09960-023
Figure 22. THD + N vs. Output Power into 16 Ω, Headphone Amplifier,
Stereo Operation
Figure 25. THD + N vs. Output Power into 32 Ω, Headphone Amplifier,
Stereo Operation
100
10
1
0.1
0.01
0.001
10 100k
THD + N (%)
FREQUENCY (Hz)
100 1k 10k
PVDD = 2.7V
R
L
= 16
20mW
10mW
09960-025
100
10
1
0.1
0.01
0.001
10 100k
THD + N (%)
FREQUENCY (Hz)
100 1k 10k
PVDD = 2.7V
R
L
= 32
09960-026
10mW
5mW
Figure 23. THD + N vs. Frequency, Headphone Amplifier,
R
L
= 16 Ω, PVDD = 2.7 V
Figure 26. THD + N vs. Frequency, Headphone Amplifier,
R
L
= 32 Ω, PVDD = 2.7 V
–100
10 100k
PSRR (dB)
FREQUENCY (Hz)
100 1k 10k
–90
–120
–110
–80
–70
–60
–50
–40
–30
20
09960-022
–100
10 100k
PSRR (dB)
FREQUENCY (Hz)
100 1k 10k
–90
–120
–110
–80
–70
–60
–50
–40
–30
20
09960-027
Figure 27. Power Supply Rejection Ratio (PSRR) vs. Frequency,
Headphone Amplifier
Figure 24. Power Supply Rejection Ratio (PSRR) vs. Frequency,
Class-D Amplifier
SSM2804
Rev. 0 | Page 13 of 36
THEORY OF OPERATION
The SSM2804 audio subsystem features a filterless modulation
scheme that greatly reduces the external component count, con-
serving board space and, thus, reducing system cost. The SSM2804
does not require an output filter but, instead, relies on the inherent
inductance of the speaker coil and the natural filtering of the
speaker and human ear to fully recover the audio component
of the square wave output.
Most Class-D amplifiers use some variation of pulse-width
modulation (PWM), but the SSM2804 uses Σ-Δ modulation to
determine the switching pattern of the output devices, resulting
in a number of important benefits.
Σ-Δ modulators do not produce a sharp peak with many
harmonics in the AM frequency band, as pulse-width
modulators often do.
Σ-Δ modulation provides the benefits of reducing the
amplitude of spectral components at high frequencies,
that is, reducing EMI emissions that might otherwise
be radiated by speakers and long cable traces.
The SSM2804 does not require external EMI filtering for
twisted speaker cable lengths shorter than 10 cm. If longer
speaker cables are used, the SSM2804 has emission limiting
circuitry that allows significantly longer speaker cable.
Due to the inherent spread-spectrum nature of Σ-Δ modu-
lation, the need for modulator synchronization is eliminated
for designs that incorporate multiple SSM2804 amplifiers.
Using the I
2
C control interface, the gain of the SSM2804 can
be selected from a range of +12 dB to −63 dB in 32 steps. Other
features accessed from the I
2
C interface include the following:
Independent left/right channel shutdown
Variable ultralow EMI emission limiting circuitry
Automatic level control (ALC) for high quality speaker
protection
Stereo-to-mono mixing operation
The SSM2804 also offers protection circuits for overcurrent and
overtemperature protection.
POP-AND-CLICK SUPPRESSION
Voltage transients at the output of audio amplifiers can occur
when shutdown is activated or deactivated. Voltage transients
as low as 10 mV can be heard as an audio pop in the speaker.
Clicks and pops can also be classified as undesirable audible
transients generated by the amplifier system and, therefore, as
not coming from the system input signal. Such transients may
be generated when the amplifier system changes its operating
mode. For example, the following may be sources of audible
transients: system power-up and power-down, mute and
unmute, input source change, and sample rate change.
The SSM2804 has a pop-and-click suppression architecture that
reduces these output transients, resulting in noiseless activation
and deactivation.
OUTPUT MODULATION DESCRIPTION
The SSM2804 uses three-level, Σ-Δ output modulation. Each
output can swing from GND to V
DD
and vice versa. Ideally, when
no input signal is present, the output differential voltage is 0 V
because there is no need to generate a pulse. In a real-world
situation, noise sources are always present.
Due to the constant presence of noise, a differential pulse is
generated, when required, in response to this stimulus. A small
amount of current flows into the inductive load when the differ-
ential pulse is generated.
Most of the time, however, the output differential voltage is 0 V,
due to the Analog Devices, Inc., three-level, Σ-Δ output modu-
lation. This feature ensures that the current flowing through the
inductive load is small.
When the user wants to send an input signal, an output pulse
(OUT+ and OUT−) is generated to follow the input voltage.
The differential pulse density (V
OUT
) is increased by raising the
input signal level. Figure 28 depicts three-level, Σ-Δ output
modulation with and without input stimulus.
OUTPUT > 0V
+5V
0V
OUT+
+5V
0V
OUT–
+5V
0V
V
OUT
OUTPUT < 0V
+5V
0V
OUT+
+5V
0V
OUT–
0V
–5V
V
OUT
OUTPUT = 0V
OUT+
+5V
0V
+5V
0V
OUT–
+5V
–5V
0V
V
OUT
09960-104
Figure 28. Three-Level, Σ-Δ Output Modulation
With and Without Input Stimulus
SSM2804
Rev. 0 | Page 14 of 36
HARDWARE-BASED HEADPHONE LIMITER
To provide fail-safe headphone level limiting independent of
the register values sent to the amplifier over the I
2
C bus, the
SSM2804 incorporates an optional hardware-based headphone
limiter feature. The user controls the limiter level by supplying
a voltage at the
SD
pin (see ). The hardware limiter is
activated by setting the LIM_MODE bit to 0 in the additional
control register (Bit D3 of Register 0x0E). After the desired
limiter value is set, the user can lock the limiter setting by
setting the LIMLOCK bit (Bit D7 of Register 0x0E).
Table 7
Table 7. Hardware Limiter Options
Limiter
Level
Power into
32 Ω (mW)
Power into
16 Ω (mW)
SD
Pin Voltage
Shutdown N/A N/A <0.87 V
±0.40 V 2.5 5 0.87 V < V
SD
< 1.08 V
±8 V 10 20 1.08 V < V
SD
< 1.29 V
±1.13 V 20 40 V
SD
> 1.29 V
Note that after the hardware limiter lock bit is set, the locked
levels cannot be reset until the SSM2804 is powered down, the
SD
pin is strobed low, or all eight bits of the software reset
register (Register 0x10) are set to 0.
In addition to the hardware-based limiter, several other limiter
levels can be selected using the I
2
C-based limiter function (set
the HPLIM bits of Register 0x0E; see Table 4 4). The effect of
the limiter function on the headphone output is shown in
Figure 29.
09960-028
CH1 500mV
B
W
M20.0ms A CH1 110mV
Figure 29. Limited Headphone Signal
ACTIVATING OR DEACTIVATING THE EMISSION
LIMITING CIRCUITRY
To activate or deactivate the emission limiting circuitry, change
the value of the EDGE bits in the additional control register
(Bits[D1:D0] of Register 0x0E). Four levels of emission control
are available, allowing the user to determine the best trade-off
between efficiency and EMI reduction.
In the default (fastest edge) mode, the user can pass FCC
Class-B emission testing with 10 cm twisted pair speaker wire
for loudspeaker connection. If longer speaker wire is desired,
change the EDGE setting to a slower edge rate mode.
The trade-off is slightly lower efficiency and noise performance.
The penalty for using the emission control circuitry is far less
than the decreased performance observed when using a ferrite
bead based EMI filter for emission limiting purposes.
AUTOMATIC LEVEL CONTROL (ALC)
Automatic level control (ALC) is a function that automatically
adjusts amplifier gain to generate the desired output amplitude
with reference to a particular input stimulus. The primary use for
the ALC is to protect an audio power amplifier or speaker load
from the damaging effects of clipping or current overloading.
This is accomplished by limiting the output amplitude of the
amplifier upon reaching a preset threshold voltage. Another
benefit of the ALC is that it makes sound sources with a wide
dynamic range more intelligible by boosting low level signals
and limiting very high level signals.
Before activating the ALC by setting the ALCEN bit (Bit D7
of Register 0x0B), the user has full control of the left and right
channel PGA gain. After the ALC is activated (ALCEN = 1),
the user has no control over the gain settings; the left channel
PGA gain is locked into the device and controls the gain for both
the left and right channels. To change the gain, the user must
reset the ALCEN bit to 0 and then load the new gain settings.
Figure 30 shows the response of the SSM2804 to a linearly
increasing input signal. When the output reaches the current
threshold value, the amplifier gain decreases by 0.5 dB so that
the output voltage remains under the threshold. As more atten-
uation is added to the system, the threshold increases according
to a profile determined by the compressor setting bits in the
ALC Control 2 register (Bits[D6:D5] of Register 0x0B), causing
a rounded “knee” as the output voltage approaches the output
limiter level. The effect of this compression curve is shown in
Figure 30.
5.6
5.2
4.8
4.4
4.0
3.6
3.2
2.8
2.4
1.6
1.2
2.0
0.8
0.4
0
0 20 40 60 80 100 120 140 160 180 200
TIME (ms)
OUTPUT VOLTAGE LEVEL (V)
INPUT
GAIN = 6dB
GAIN = 12dB
GAIN = 18dB
GAIN = 24dB
09960-034
Figure 30. Output Response to Linearly Increasing Input Ramp Signal
When the input level is small and the output voltage is smaller
than the ALC threshold value, the gain of the amplifier stays at
the preset gain setting. When the input exceeds the ALC thresh-
old value, the ALC gradually reduces the gain from the preset
gain setting down to 1 dB.

SSM2804CBZ-RL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Audio Amplifiers Audio Subsystem w/ Stereo ClassD Speakr
Lifecycle:
New from this manufacturer.
Delivery:
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