AD7843ARQZ-REEL7 Datasheet AD7843ARQZ, AD7843ARUZ-REEL7, AD7843ARUZ | P13-P15

AD7843

Rev. B | Page 12 of 20

ANALOG INPUT

Figure 19 shows an equivalent circuit of the analog input

structure of the AD7843, which contains a block diagram of the

input multiplexer, the differential input of the ADC, and the

differential reference.

Table 5 shows the multiplexer address corresponding to each

analog input, both for the SER/

DFR

bit in the control register

set high and low. The control bits are provided serially to the

device via the DIN pin. For more information on the control

When the converter enters hold mode, the voltage difference

between the +IN and −IN inputs (see Figure 19) is captured on

the internal capacitor array. The input current on the analog

inputs depends on the conversion rate of the device. During the

sample period, the source must charge the internal sampling

capacitor (typically 37 pF). Once the capacitor is fully charged,

there is no further input current. The rate of charge transfer

from the analog source to the converter is a function of

conversion rate.

Acquisition Time

The track-and-hold amplifier enters tracking mode on the

falling edge of the fifth DCLK after the START bit us detected

(see Figure 24). The time required for the track-and-hold

amplifier to acquire an input signal depends on how quickly the

37 pF input capacitance is charged. With zero source impedance

on the analog input, three DCLK cycles are always sufficient to

acquire the signal to the 12-bit level. With a source impedance

on the analog input, the actual acquisition time required is

calculated using the formula:

(

)

pF371004.8 ×

Ω

INACQ

where R

is the source impedance of the input signal and 100 Ω

and 37 pF is the input RC value. Depending on the frequency of

DCLK used, three DCLK cycles may or may not be sufficient to

acquire the analog input signal with various source impedance

values.

02144-B-019

X+

X+ Y+

REF

EXT

X– Y– GND

X+

Y+

IN3

IN4

X–

Y+

Y–

ON-CHIP SWITCHES

4-TO-1

MUX

3-TO-1

MUX

3-TO-1

MUX

IN+

IN– REF–

REF+

ADC CORE DATA OUT

Figure 19. Equivalent Analog Input Circuit

Table 5. Analog Input, Reference, and Touch Screen Control

SER/

DFR

Analog Input X Switches Y Switches +REF

–REF

0 0 1 1 X+ OFF ON V

REF

GND

0 1 0 1 IN3 OFF OFF V

REF

GND

1 0 1 1 Y+ ON OFF V

REF

GND

1 1 0 1 IN4 OFF OFF V

REF

GND

0 0 1 0 X+ OFF ON Y+ Y−

1 0 1 0 Y+ ON OFF X+ X−

1 1 0 0 Outputs Identity Code, 1000 0000 0000

All remaining configurations are invalid addresses.

Internal node − not directly accessible by the user.

AD7843

Rev. B | Page 13 of 20

Touch Screen Settling

In some applications, external capacitors could be required

across the touch screen to filter noise associated with it, for

example, noise generated by the LCD panel or backlight

circuitry. The value of these capacitors causes a settling time

requirement when the panel is touched. The settling time

typically appears as a gain error. There are several methods for

minimizing or eliminating this issue. The problem could be that

the input signal, reference, or both have not settled to their final

value before the sampling instant of the ADC. Additionally, the

reference voltage could still be changing during the conversion

cycle. One option is to stop, or slow down the DCLK for the

required touch screen settling time. This allows the input and

reference to stabilize for the acquisition time, which resolves the

issue for both single-ended and differential modes.

The other option is to operate the AD7843 in differential mode

only for the touch screen and to program the AD7843 to keep

the touch screen drivers on and not go into power-down (PD0

= PD1 = 1). Several conversions might be required, depending

on the settling time required and the AD7843 data rate. Once

the required number of conversions are made, the AD7843 can

then be placed into a power-down state on the last

measurement. The last method is to use the 15 DCLK cycle

mode, which maintains the touch screen drivers on until it is

commanded to stop by the processor.

Reference Input

The voltage difference between +REF and −REF (see Figure 19)

sets the analog input range. The AD7843 operates with a refer-

ence input in the range of 1 V to V

. The voltage into the V

REF

input is not buffered and directly drives the capacitor DAC

portion of the AD7843. Figure 20 shows the reference input

circuitry. Typically, the input current is 8 µA with V

REF

= 2.5 V

and f

SAMPLE

= 125 kHz. This value varies by a few microamps,

depending on the result of the conversion. The reference current

diminishes directly with both conversion rate and reference

voltage. As the current from the reference is drawn on each bit

decision, clocking the converter more quickly during a given

conversion period does not reduce the overall current drain

from the reference.

02144-B-020

X+

Y+

REF

3-TO-1

MUX

ADC

Figure 20. Reference Input Circuitry

When making touch screen measurements, conversions can be

made in the differential (ratiometric) mode or the single-ended

mode. If the SER/

DFR

bit is set to 1 in the control register, a

single-ended conversion is performed. Figure 21 shows the

configuration for a single-ended Y-coordinate measurement.

The X+ input is connected to the analog to digital converter, the

Y+ and Y− drivers are turned on, and the voltage on X+ is

digitized. The conversion is performed with the ADC referenced

from GND to V

REF

. The advantage of this mode is that the

switches that supply the external touch screen can be turned off

once the acquisition is complete, resulting in a power saving.

However, the on resistance of the Y drivers affects the input

voltage that can be acquired. The full touch screen resistance

may be in the order of 200 Ω to 900 Ω, depending on the manu-

facturer. Therefore if the on resistance of the switches is

approximately 6 Ω, true full-scale and zero-scale voltages cannot

be acquired regardless of where the pen/stylus is on the touch

screen. Note that the minimum touch screen resistance

recommended for use with the AD7843 is approximately 70 Ω.

02144-B-021

REF

GND

Y+

Y–

X+ IN+

IN+

IN–

REF+

ADC CORE

REF–

Figure 21. Single-Ended Reference Mode (SER/

DFR

= 1)

In this mode of operation, therefore, some voltage is likely to be

lost across the internal switches and, in addition to this, it is

unlikely that the internal switch resistance will track the resis-

tance of the touch screen over temperature and supply, providing

an additional source of error.

The alternative to this situation is to set the SER/

DFR

bit low. If

one again considers making a Y-coordinate measurement, but

now the +REF and −REF nodes of the ADC are connected

directly to the Y+ and Y− pins, this means the analog-to-digital

conversion is ratiometric. The result of the conversion is always

a percentage of the external resistance, independent of how it

could change with respect to the on resistance of the internal

switches. Figure 22 shows the configuration for a ratiometric Y-

coordinate measurement. It should be noted that the differential

reference mode can be used only with +V

since the source of

the +REF voltage and cannot be used with V

REF

The disadvantage of this mode of operation is that during both

the acquisition phase and conversion process, the external touch

screen must remain powered. This results in additional supply

current for the duration of the conversion.

02144-B-022

GND

Y+

Y–

X+ IN+

IN+

IN–

REF+

ADC CORE

REF–

Figure 22. Differential Reference Mode (SER/

DFR

= 0)

AD7843

Rev. B | Page 14 of 20

CONTROL REGISTER

The control word provided to the ADC via the DIN pin is

shown in Table 6. This provides the conversion start, channel

addressing, ADC conversion resolution, configuration, and

power-down of the AD7843.

Table 6 provides detailed information on the order and

description of these control bits within the control word.

Initiate START

The first bit, the S bit, must always be set to 1 to initiate the start

of the control word. The AD7843 ignores any inputs on the DIN

line until the START bit is detected.

Channel Addressing

The next three bits in the control register, A2, A1, and A0, select

the active input channel(s) of the input multiplexer (see Table 5

and Figure 19), touch screen drivers, and the reference inputs.

MODE

The MODE bit sets the resolution of the analog to digital

converter. With 0 in this bit, the following conversion has 12 bits

of resolution. With 1 in this bit, the following conversion has 8

bits of resolution.

SER/

DFR

The SER/

DFR

bit controls the reference mode, which can be

either single-ended or differential if 1 or 0 is written to this bit,

respectively. The differential mode is also referred to as the

ratiometric conversion mode. This mode is optimum for

X-position and Y-position measurements. The reference is

derived from the voltage at the switch drivers, which is almost

the same as the voltage to the touch screen. In this case, a

separate reference voltage is not needed because the reference

voltage to the ADC is the voltage across the touch screen. In

single-ended mode, the reference voltage to the converter is

always the difference between the V

REF

and GND pins. See

Table 5 and Figure 19 through Figure 22 for further

information.

Because the supply current required by the device is so low, a

precision reference can be used as the supply source to the

AD7843. It may also be necessary to power the touch screen

from the reference, which could require 5 mA to 10 mA. A

REF19x voltage reference can source up to 30 mA and, as such,

could supply both the ADC and the touch screen. Care must be

taken, however, to ensure that the input voltage applied to the

ADC does not exceed the reference voltage and therefore the

supply voltage. See the Absolute Maximum Ratings section.

Note that the differential mode can only be used for X-position

and Y-Position measurements. All other measurements require

single-ended mode.

PD0 and PD1

The power management options are selected by programming

the power management bits, PD0 and PD1, in the control

PD0 defaults to 0, while PD1 defaults to 1..

Table 6. Control Register Bit Function Description

MSB LSB

S A2 A1 A0 MODE

SER/DFR

PD1 PD0

Bit Mnemonic Comment

7 S

Start Bit. The control word starts with the first high bit on DIN. A new control word can start every 15th DCLK cycle

when in the 12-bit conversion mode, or every 11th DCLK cycle when in 8-bit conversion mode.

6–4 A2–A0

Channel Select Bits. These three address bits, along with the SER/DFR

bit, control the setting of the multiplexer input,

switches, and reference inputs, as described in Table 5.

3 MODE

12-Bit/8-Bit Conversion Select Bit. This bit controls the resolution of the following conversion. With 0 in this bit, the

conversion has a 12-bit resolution, or with 1 in this bit, the conversion has a 8-bit resolution.

SER/DFR

Single-Ended/Differential Reference Select Bit. Along with Bits A2–A0, this bit controls the setting of the multiplexer

input, switches, and reference inputs, as described in Table 5.

1, 0 PD1, PD0 Power Management Bits. These two bits decode the power-down mode of the AD7843, as shown in Table 7.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21

AD7843ARQZ-REEL7

Mfr. #:

Buy AD7843ARQZ-REEL7

Manufacturer:

Analog Devices Inc.

Description:

Touch Screen Controllers IC 27V 12-BIT TouchScrn Digitizer

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AD7843ARQZ-REEL7

AD7843ARQZ-REEL7

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