AD7843
Rev. B | Page 18 of 20
Sixteen Clocks per Cycle
The control bits for the next conversion can be overlapped with
the current conversion to allow for a conversion every 16 DCLK
cycles, as shown in Figure 26. This timing diagram also allows
for the possibility of communication with other serial peripherals
between each (eight DCLK) byte transfer between the processor
and the converter. However, the conversion must be completed
within a short enough time frame to avoid capacitive droop
effects that could distort the conversion result. It should also be
noted that the AD7843 is fully powered while other serial
communications are taking place between byte transfers.
Fifteen Clocks per Cycle
Figure 27 shows the fastest way to clock the AD7843. This
scheme does not work with most microcontrollers or DSPs
because, in general, they are not capable of generating a
15-clock-cycle-per-serial transfer. However, some DSPs allow
the number of clocks per cycle to be programmed; this method
could also be used with FPGAs (field programmable gate
arrays) or ASICs (application specific integrated circuits). As in
the 16-clocks-per-cycle case, the control bits for the next
conversion are overlapped with the current conversion to allow
a conversion every 15 DCLK cycles, using 12 DCLKs to
perform the conversion and three DCLKs to acquire the analog
input. This effectively increases the throughput rate of the
AD7843 beyond that used for the specifications that are tested
using 16 DCLKs per cycle, and DCLK = 2 MHz.
8-Bit Conversion
By setting the MODE bit to 1 in the control register, the
AD7843 can operate in 8-bit rather than 12-bit mode. This
mode allows a faster throughput rate to be achieved, assuming
8-bit resolution is sufficient. When using the 8-bit mode, a
conversion is complete four clock cycles earlier than in the
12-bit mode. This could be used with serial interfaces that
provide 12 clock transfers, or two conversions could be
completed with three 8-clock transfers. The throughput rate
increases by 25% as a result of the shorter conversion cycle, but
the conversion itself can occur at a faster clock rate because the
internal settling time of the AD7843 is not as critical because
settling to 8 bits is all that is required. The clock rate can be as
much as 50% faster. The faster clock rate and fewer clock cycles
combine to provide double the conversion rate.
02144-B-026
CS
DCLK
DIN
BUSY
DOUT
1
S S
11 10 9 8 7 6 5 4 3 2 1 0 11 10 9
111888
CONTROL BITS CONTROL BITS
Figure 26. Conversion Timing, 16 DCLKS per Cycle, 8-Bit Bus Interface. No DCLK delay required with dedicated serial port.
02144-B-027
CS
DCLK
DIN
BUSY
DOUT
S A2 PD1 PD0A1 A0
MODE
SER/
DFR
MODE
SER/
DFR
1
11 10 9 8 7 6 5 4 3 2 1 0 11 10 9 8 7 6 5 4
15 1 15 1
SA2 SA2A1 PD1 PD0A0
Figure 27. Conversion Timing, 15 DCLKS per Cycle, Maximum Throughput Rate
AD7843
Rev. B | Page 19 of 20
PEN INTERRUPT REQUEST
The pen interrupt equivalent output circuitry is outlined in
Figure 28. By connecting a pull-up resistor (10 kΩ to 100 kΩ)
between V
CC
and this CMOS logic open-drain output, the
PENIRQ
output remains high normally. If
PENIRQ
is enabled
(see Table 7), when the touch screen connected to the AD7843
is touched via a pen or finger, the
PENIRQ
output goes low,
initiating an interrupt to a microprocessor that can then instruct
a control word to be written to the AD7843 to initiate a conver-
sion. This output can also be enabled between conversions
during power-down (see Table 7 ), allowing power-up to be
initiated only when the screen is touched. The result of the first
touch screen coordinate conversion after power-up is valid,
assuming any external reference is settled to the 12- or 8-bit
level as required.
02144-B-028
TOUCH
SCREEN
PENIRQ
ENABLE
EXTERNAL
PULL-UP
PENIRQ
ON
Y+
100k
+V
CC
+V
CC
Y–
X+
Figure 28.
PENIRQ
Functional Block Diagram
Figure 29 assumes that the
PENIRQ
function is enabled in the
last write or that the part has just been powered up, so
PENIRQ
is enabled by default. Once the screen is touched, the
PENIRQ
output goes low a time t
PEN
later. This delay is approximately
5 µs, assuming a 10 nF touch screen capacitance, and varies with
the touch screen resistance actually used.
Once the START bit is detected, the pen interrupt function is
disabled and the
PENIRQ
cannot respond to screen touches.
The
PENIRQ
output remains low until the fourth falling edge
of DCLK after the START bit has been clocked in, at which
point it returns high as soon as possible, regardless of the touch
screen capacitance. This does not mean that the pen interrupt
function is now enabled again because the power-down bits
have not yet been loaded to the control register. Regardless of
whether
PENIRQ
is to be enabled again or not, the
PENIRQ
output normally always idles high. Assuming that the
PENIRQ
is enabled again as shown in Figure 29, once the conversion is
complete, the
PENIRQ
output responds to a screen touch again.
The fact that
PENIRQ
returns high almost immediately after
the fourth falling edge of DCLK means the user avoids any
spurious interrupts on the microprocessor or DSP, which could
occur if the interrupt request line on the microprocessor/DSP
was unmasked during or toward the end of conversion with the
PENIRQ
pin still low. Once the next START bit is detected by
the AD7843, the
PENIRQ
function is disabled again.
If the control register write operation overlaps with the data
read, a START bit is always detected prior to the end of
conversion. This means that even if the
PENIRQ
function has
been enabled in the control register, it is disabled by the START
bit again before the end of the conversion is reached; therefore
the
PENIRQ
function effectively cannot be used in this mode.
However, as conversions are occurring continuously, the
PENIRQ
function is not necessary and, therefore, redundant.
GROUNDING AND LAYOUT
For information on grounding and layout considerations for the
AD7843, refer to Application Note AN-577, Layout and
Grounding Recommendations for Touch Screen Digitizers.
02144-B-029
SA2A1A0 1 0
81 1 13 16
MODE
SER/
DFR
SCREEN
TOUCHED
HERE
INTERRUPT
PROCESSOR
NO RESPONSE TO TOUCH
t
PEN
PENIRQ
CS
DCLK
DIN
(START)
PD1 = 1, PD0 = 0, PENIRQ
ENABLED AGAIN
Figure 29.
PENIRQ
Timing Diagram
AD7843
Rev. B | Page 20 of 20
OUTLINE DIMENSIONS
16
9
8
1
PIN 1
SEATING
PLANE
0.010
0.004
0.012
0.008
0.025
BSC
0.010
0.006
0.050
0.016
COPLANARITY
0.004
0.065
0.049
0.069
0.053
0.154
BSC
0.236
BSC
COMPLIANT TO JEDEC STANDARDS MO-137AB
0.193
BSC
Figure 30. 16-Lead Shrink Small Outline Package [QSOP]
(RQ-16)
Dimensions shown in inches
16
9
81
PIN 1
SEATING
PLANE
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX
0.20
0.09
0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB
Figure 31. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Linearity Error (LSB)
1
Package Description Package Option
AD7843ARQ −40°C to +85°C ±2 QSOP RQ-16
AD7843ARQ-REEL −40°C to +85°C ±2 QSOP RQ-16
AD7843ARQ-REEL7 −40°C to +85°C ±2 QSOP RQ-16
AD7843ARQZ
2
−40°C to +85°C ±2 QSOP RQ-16
AD7843ARQZ-REEL
2
−40°C to +85°C ±2 QSOP RQ-16
AD7843ARQZ-REEL7
2
−40°C to +85°C ±2 QSOP RQ-16
AD7843ARU −40°C to +85°C ±2 TSSOP RU-16
AD7843ARU-REEL −40°C to +85°C ±2 TSSOP RU-16
AD7843ARU-REEL7 −40°C to +85°C ±2 TSSOP RU-16
EVAL-AD7843CB
3
Evaluation Board
EVAL-CONTROL BRD2
4
Controller Board
1
Linearity error here refers to integral linearity error.
2
Z = Pb-free part. Pb-free parts are branded with a # before the date code.
3
This can be used as a stand-alone evaluation board, or in conjunction with the Evaluation Board Controller for evaluation/demonstration purposes.
4
This Evaluation Board Controller is a complete unit allowing a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designator.
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02144–0–3/04(B)

AD7843ARQZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Touch Screen Controllers IC 27V 12-BIT TouchScrn Digitizer
Lifecycle:
New from this manufacturer.
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