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MTFDDAA064MAM-1J1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P31
Device ID
Table 12: Identify Device
See Note 1 for setting definitions
Word Bit(s) Setting Default Value Description
0 General configuration bit-significant information
15 F 0b 0 = ATA device
14–8 X 0000100b Retired
7 F 0b 1 = removable media device
6 F 1b Obsolete
5–3 X 000b Retired
2 V 0b Response incomplete
1 X 0b Retired
0 F 0b Reserved
1 3FFFh Obsolete
2 F C837h Specific configuration
3 F 0010h Obsolete
4 F 0000h 0000h Retired
6 F 003Fh Obsolete
7 (O)V 0000h 0000h
Reserved for assignment by the CompactFlash™ Association
9 ( )X 0000h Retired
10 (M)F varies Serial number (20 ASCII characters)
20 ( )X 0000h 0000h
0000h
Retired/obsolete
23 (M)F varies Firmware revision (8 ASCII characters)
27 (M)F varies Model number (40 ASCII characters)
47 15–8 F 80h 80h
7–0 F 10h 00h = Reserved
01h-FFh = Maximum number of logical sectors that shall be
transferred per DRQ data block on READ/WRITE MULTIPLE
commands
48 Trusted computing feature set options
15 F 0b Shall be cleared to 0
14 F 1b Shall be set to 1
13–1 F 0000000000000b Reserved for the Trusted Computing Group
0 F 0b 1 = Trusted computing feature set is support
C400v 1.8-Inch NAND Flash SSD
Device ID
PDF: 09005aef84559b26
realssd_c400v_1_8.pdf - Rev. D 09/11 EN
10
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
Table 12: Identify Device (Continued)
See Note 1 for setting definitions
Word Bit(s) Setting Default Value Description
49 Capabilities
15–14 F 00b Reserved for the IDENTIFY PACKET DEVICE command
13 F 1b 1 = Standby timer values as specified in this standard are
supported
0 = Standby timer values shall be managed by the device
12 F 0b Reserved for the IDENTIFY PACKET DEVICE command
11 F 1b 1= IORDY supported
0 = IORDY may be supported
10 F 1b 1 = IORDY may be disabled
9 1b 1 = LBA supported
8 F 1b 1 = DMA supported.
7–0 F 00000000b Retired
50 Capabilities
15 F 0b Shall be cleared to zero
14 F 1b Shall be set to one
13–2 F 000000000000b Reserved
1 X 0b Obsolete
0 F 1b Shall be set to one to indicate a vendor specific standby tim-
er value minimum.
51 ( )X 0000h 0000h Obsolete
53 15–3 F 0000000000000b Reserved
2 F 1b 1 = Fields reported in word 88 are valid
0 = Fields reported in word 88 are not valid
1 F 1b 1 = Fields reported in words (70:64) are valid
0 = Fields reported in words (70:64) are not valid
0 X 1b Obsolete
54 ()X 3FFFh 0010h
003Fh FC10h
00FBh
Obsolete
59 15 F 0b 1 = The BLOCK ERASE EXT command is supported
14 F 0b 1 = The OVERWRITE EXT command is supported
13 F 0b 1 = The CRYPTO SCRAMBLE EXT command is supported
12 F 0b 1 = The sanitize feature set is supported
11–9 F 000b Reserved
8 V 1b 1 = Multiple sector setting is valid
7–0 V 00000001b xxh = Current setting for number of logical sectors that shall
be transferred per DRQ data block on READ/WRITE MULTI-
PLE commands
60 M(F) Varies by capacity Total number of user addressable logical sectors
C400v 1.8-Inch NAND Flash SSD
Device ID
PDF: 09005aef84559b26
realssd_c400v_1_8.pdf - Rev. D 09/11 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
Table 12: Identify Device (Continued)
See Note 1 for setting definitions
Word Bit(s) Setting Default Value Description
62 ()X 0000h Obsolete
63 15–11 F 00000b Reserved
10 V 0b 1 = Multiword DMA mode 2 is selected
0 = Multiword DMA mode 2 is not selected
9 V 0b 1 = Multiword DMA mode 1 is selected
0 = Multiword DMA mode 1 is not selected
8 V 0b 1 = Multiword DMA mode 0 is selected
0 = Multiword DMA mode 0 is not selected
7–3 F 0000b Reserved
2 F 1b 1 = Multiword DMA mode 2 and below are supported
1 F 1b 1 = Multiword DMA mode 1 and below are supported
0 F 1b 1 = Multiword DMA mode 0 is supported
64 15–8 F 0 Reserved
7–0 F 03h PIO modes supported
65 F 0078h Minimum multiword DMA transfer cycle time per word
Cycle time in nanoseconds
66 F 0078h Manufacturer's recommended multiword DMA transfer cy-
cle time
Cycle time in nanoseconds
67 F 0078h Minimum PIO transfer cycle time without flow control
Cycle time in nanoseconds
68 F 0078h Minimum PIO transfer cycle time with IORDY flow control
Cycle time in nanoseconds
69 F Additional Supported
15 F 0b 1 = CFast specification support
14 F 1b 1 = Deterministic read after trim is supported
13 F 0b 1 = Long physical sector alignment error reporting control is
supported
12 F 0b 1 = DEVICE CONFIGURATION IDENTIFY DMA and DEVICE
CONFIGURATION SET DMA are supported
11 F 0b 1 = READ BUFFER DMA is supported
10 F 0b 1 = WRITE BUFFER DMA is supported
9 F 0b 1 = SET MAX PASSWORD DMA and SET MAX UNLOCK DMA
are supported
8 F 0b 1 = DOWNLOAD MICROCODE DMA is supported
7 F 0b Reserved for IEEE-1667
6 F 0b 1 = Optional ATA device 28-bit commands supported
5 F 0b 1 = Read zero after trim is supported
4–0 F 00000b Reserved
70 F 0000h Reserved
C400v 1.8-Inch NAND Flash SSD
Device ID
PDF: 09005aef84559b26
realssd_c400v_1_8.pdf - Rev. D 09/11 EN
12
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P31

MTFDDAA064MAM-1J1

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Buy MTFDDAA064MAM-1J1
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SSD 64GB 1.8" MLC SATA III 5V
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