Dual-Channel LITTLE FOOT
®
6-Pin SC-70 MOSFET Copper Leadframe Version
Recommended Pad Pattern and Thermal Performance 175 °C Rated Part
APPLICATION NOTE
Application Note AN917
www.vishay.com
Vishay Siliconix
Revision: 15-Apr-13
2
Document Number: 75130
For technical questions, contact: powermosfettechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 3
THERMAL PERFORMANCE
Junction-to-Foot Thermal Resistance
(the Package Performance)
Thermal performance for the dual SC-70 6-pin package is
measured as junction-to-foot thermal resistance, in which
the “foot” is the drain lead of the device as it connects with
the body. The junction-to-foot thermal resistance for this
device is typically 80 °C/W, with a maximum thermal
resistance of approximately 100 °C/W. This data compares
favorably with another compact, dual-channel package
- the dual TSOP-6 - which features a typical thermal
resistance of 75 °C/W and a maximum of 90 °C/W.
Power Dissipation for 175 °C Rated Part
The typical RJA for the dual-channel 6-pin SC-70 with a
copper leadframe is 224 °C/W steady-state, compared to
413 °C/W for the Alloy 42 version. All figures are based on
the 1-inch
2
FR4 test board. The following example shows
how the thermal resistance impacts power dissipation
for the dual 6-pin SC-70 package at varying ambient
temperatures.
Alloy 42 Leadframe
Although they are intended for low-power applications,
devices in the 6-pin SC-70 dual-channel configuration will
handle power dissipation in excess of 0.5 W.
TESTING
To further aid the comparison of copper and Alloy 42
leadframes, Figures 4 and 5 illustrate the dual-channel 6-pin
SC-70 thermal performance on two different board sizes
and pad patterns. The measured steady-state values of
R
JA
for the dual 6-pin SC-70 with varying leadframes are as
follows:
The results indicate that designers can reduce thermal
resistance (
JA
) by 34 % simply by using the copper
leadframe device as opposed to the Alloy 42 version. In this
example, a 174 °C/W reduction was achieved without an
increase in board area. If an increase in board size is
feasible, a further 120 °C/W reduction can be obtained by
utilizing a 1-inch
2
. PCB area.
6-07CS draoB fo kcaB6-07CS draoB fo tnorF
D1
G2
S2
S1
G1
D2
SC70−6 DUAL
vishay.com
ALLOY 42 LEADFRAME
ROOM AMBIENT 25 °C ELEVATED AMBIENT 60 °C
P
D
T
J(max.)
- T
A
R
JA
P
D
175 °C - 25 °C
413 °C/W
P
D
363 mW
T
J(max.)
- T
A
175 °C - 60 °C
413 °C/W
P
D
R
JA
P
D
P
D
278 mW
COOPER LEADFRAME
ROOM AMBIENT 25 °C ELEVATED AMBIENT 60 °C
LITTLE FOOT 6-PIN SC-70
ALLOY 42 COPPER
1) Minimum recommended pad
pattern on the EVB board (see fig. 3).
518 °C/W 344 °C/W
2) Industry standard 1-inch
2
PCB
with maximum copper both sides.
413 °C/W 224 °C/W
P
D
T
J(max.)
- T
A
R
JA
P
D
175 °C - 25 °C
224 °C/W
P
D
669 mW
T
J(max.)
- T
A
175 °C - 60 °C
224 °C/W
P
D
R
JA
P
D
P
D
513 mW
Dual-Channel LITTLE FOOT
®
6-Pin SC-70 MOSFET Copper Leadframe Version
Recommended Pad Pattern and Thermal Performance 175 °C Rated Part
APPLICATION NOTE
Application Note AN917
www.vishay.com
Vishay Siliconix
Revision: 15-Apr-13
3
Document Number: 75130
For technical questions, contact: powermosfettechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
The dual copper leadframe versions have the following
suffix:
Fig. 4 Dual SC70-6 Thermal Performance on EVB Fig. 5 Dual SC70-6 Comparison on 1-inch
2
PCB
Dual: Sx19xxEDH or Sx19xxEEH
Compl.: Sx15xxEDH or Sx15xxEEH
Time (s)
Thermal Resistance (°C/W)
0
1
500
100
200
100 1000
300
1010
-1
10
-2
10
-3
10
-4
10
-5
Alloy 42
400
Copper
Time (s)
Thermal Resistance (°C/W)
0
1
500
100
200
100 1000
300
1010
-1
10
-2
10
-3
10
-4
10
-5
400
Copper
Alloy
42
Legal Disclaimer Notice
www.vishay.com
Vishay
Revision: 08-Feb-17
1
Document Number: 91000
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SQ1563AEH-T1_GE3

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MOSFET N Ch 20Vds 8Vgs AEC-Q101 Qualified
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