NCV8518
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10
OPERATING DESCRIPTION
General
The NCV8518 is a precision micropower voltage
regulator featuring low quiescent current (100 mA typical at
250 mA load) and low dropout voltage (450 mV typical at
150 mA). Integrated microprocessor control functions
include Watchdog, Wakeup and RESET
. An Enable input is
provided for logic level control of the regulator state. The
combination of low quiescent current and comprehensive
microprocessor interface functions make the NCV8518
ideal for use in both battery operated and automotive
applications.
The NCV8518 is internally protected against short circuit
and thermal runaway conditions. No external components
are required to engage these protective mechanisms. The
device continues to operate through 45 volt input transients,
an important consideration in automotive environments.
Wakeup and Watchdog
To reduce battery drain, a microprocessor or
microcontroller can transition to a low current consumption
(“sleep”) mode when code execution is suspended or
complete. The NCV8518 Wakeup signal is generated and
output periodically to interrupt sleep mode. The nominal
Wakeup output is a 5 volt square wave (generated from
VOUT) with a duty cycle of 50%, at a frequency determined
by external timing resistor R
DELAY
. In response to the rising
edge of the Wakeup signal, the microprocessor will
subsequently output a Watchdog pulse and check its inputs
to decide if it should resume normal operation or remain in
sleep mode.
The NCV8518 responds to the falling edge of the
Watchdog signal, which it expects at least once during each
Wakeup period. When the correct Watchdog signal is
received, the Wakeup output is forced low. Other Watchdog
pulses received within the same cycle are ignored. The
Watchdog circuitry continuously monitors the input
Watchdog signal (WDI) from the microprocessor. The
absence of a falling edge on the Watchdog input during one
Wakeup cycle will cause a Reset pulse to be output at the end
of the Wakeup cycle (see Figure 4).
RESET
As output voltage falls, the RESET output will maintain
its current state down to V
OUT
= 1 V. A Reset signal (active
low) is asserted for any of four conditions:
1. During power up, RESET
is held low until the
output voltage is in regulation.
2. During operation, if the output voltage falls below
the Reset threshold, RESET
switches low, and will
remain low until both the output voltage has
recovered and the Reset delay timer cycle has
completed following that recovery.
3. RESET
will switch low if the regulator does not
receive a Watchdog input signal within a Wakeup
period.
4. Regardless of output voltage, RESET
will switch
low if the regulator input voltage V
IN
, falls below
a level required to sustain the internal control
circuits. The specific voltage is temperature
dependent, and is approximately 4.75 V at 20°C.
The Wakeup output is pulled low during a RESET
regardless of the cause of the RESET. After the RESET
returns high, the Wakeup cycle begins again (see Figure 4).
The RESET
Delay Time, Wakeup signal frequency and
RESET
high to Wakeup delay time are all set by one external
resistor, RDelay, according to the following equations:
Wakeup Period (seconds) = (4.17 10
7
) * R
DELAY
(W)
RESET
Delay Time (seconds) = (5.21 10
8
) * R
DELAY
(W)
RESET
High to Wakeup Delay Time (seconds) =
(2.08 10
7
) * R
DELAY
(W)
The voltage present at the Delay pin is a buffered bandgap
voltage (~1.25 V) and can be used as a reference for an
external tracking regulator.
Enable
This is a standard TTL and CMOS logic compatible input
that can be used to turn the regulator on or off. Logic high
enables the regulator; logic low disables it (also called
shutdown). In the disabled/shutdown state, the pass
transistor is off and total quiescent current is less than 1 mA.
C1*
V
OUT
GND
V
IN
WDI
1.0 mF
I/O
RESET
RESET
0.1 mF
C2
Microprocessor
Delay
R
Delay
120 k
V
BAT
*C1 required if regulator is located far from power supply filter.
V
DD
ENABLE
Figure 17. Application Circuit
NCV8518
WAKE UP
I/O
FaultOK
ONOFF
NCV8518
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11
PACKAGE DIMENSIONS
SOIC8 EP
D SUFFIX
CASE 751AC01
ISSUE B
H
C0.10
D
E1
A
D
PIN ONE
2 X
8 X
SEATING
PLANE
EXPOSED
GAUGE
PLANE
14
58
D
C0.10
A-B
2 X
E
B
e
C0.10
2 X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
DETAIL A
END VIEW
SECTION AA
8 X
b
A-B0.25 D
C
C
C0.10
C0.20
A
A2
G
F
14
58
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. DIMENSIONS IN MILLIMETERS (ANGLES
IN DEGREES).
3. DIMENSION b DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE
0.08 MM TOTAL IN EXCESS OF THE “b”
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
4. DATUMS A AND B TO BE DETERMINED
AT DATUM PLANE H.
DIM MIN MAX
MILLIMETERS
A 1.35 1.75
A1 0.00 0.10
A2 1.35 1.65
b 0.31 0.51
b1 0.28 0.48
c 0.17 0.25
c1 0.17 0.23
D 4.90 BSC
E 6.00 BSC
e 1.27 BSC
L 0.40 1.27
L1 1.04 REF
F 2.24 3.20
G 1.55 2.51
h 0.25 0.50
q 0 8
h
AA
DETAIL A
(b)
b1
c
c1
0.25
L
(L1)
q
PAD
E1 3.90 BSC
__
A1
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
LOCATION
Exposed
Pad
1.52
0.060
2.03
0.08
0.6
0.024
1.270
0.050
4.0
0.155
ǒ
mm
inches
Ǔ
SCALE 6:1
7.0
0.275
2.72
0.107
NCV8518
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12
PACKAGE DIMENSIONS
SOIC16 LEAD WIDE BODY, EXPOSED PAD
PDW SUFFIX
CASE 751AG01
ISSUE A
G
W
U
P
M
0.25 (0.010) W
T
SEATING
PLANE
K
D 16 PL
C
M
0.25 (0.010) T UW
S S
M
F
DETAIL E
DETAIL E
R x 45
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL BE
0.13 (0.005) TOTAL IN EXCESS OF THE D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
6. 751R-01 OBSOLETE, NEW STANDARD 751R-02.
J
M
14 PL
PIN 1 I.D.
8
1
16 9
TOP SIDE
0.10 (0.004) T
16
EXPOSED PAD
18
BACK SIDE
L
H
DIM
A
MIN MAX MIN MAX
INCHES
10.15 10.45 0.400 0.411
MILLIMETERS
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.27 BSC 0.050 BSC
H 3.45 3.66 0.136 0.144
J 0.25 0.32 0.010 0.012
K 0.00 0.10 0.000 0.004
L 4.72 4.93 0.186 0.194
M 0 7 0 7
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029
____
A
B
9
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.350
0.175
0.050
0.376
0.188
0.200
0.074
DIMENSIONS: INCHES
0.024
0.150
Exposed
Pad
C
L
C
L
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NCV8518/D
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NCV8518PDG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC REG LINEAR 5V 250MA 8SOIC
Lifecycle:
New from this manufacturer.
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