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NCV8518PDG
P1-P3
P4-P6
P7-P9
P10-P12
NCV8518
http://onsemi.com
7
TIMING DIAGRAMS
V
IN
, ENABLE
RESET
W
ake Up
WDI
V
OUT
POR
RESET
Delay T
ime
RESET
High
to W
ake Up
Delay T
ime
W
ake Up Period
POR
RESET
W
ake Up
WDI
V
IN
, ENABLE
RESET
Threshold
POR
V
OUT
Decreasing
Power Down
W
ake Up
Period
Figure 2. Power Up, Sleep Mode and Normal Operation
V
IN
, ENABLE
RESET
W
ake Up
WDI
V
OUT
W
ake Up
Duty Cycle = 50%
Power Up
Microprocessor
Sleep Mode
Normal Operation with V
arying Watchdog Signal
RESET
High
to W
ake Up
Delay T
ime
POR
W
ake Up Duty Cycle will be 50% when the WDI
pulse occurs at the low state of the W
ake Up Signal.
Figure 3. Error Condition: W
atchdog Remains Low and a RESET
is Issued
V
OUT
Min WDI falling
edge delay after
W
ake Up rising
edge
W
ake Up
Response to Reset
W
ake Up
Response to
WDI
Figure 4. Power Down, Restart Sequence, and W
ake Up Response to WDI
NCV8518
http://onsemi.com
8
TYPICAL PERFORMANCE CHARACTERISTICS
−
50
OUTPUT VOL
T
AGE (V)
4.9
T
J
, TEMPERA
TURE (
°
C)
5.0
5.1
0
50
100
150
Figure 5. Output V
oltage vs. T
emperature
OUTPUT VOL
T
AGE (V)
4.99
INPUT VOL
T
AGE (V)
5.01
5.00
51
0
1
5
2
0
2
5
3
0
Figure 6. Output V
oltage vs. Input V
oltage
−
50
POR DELA
Y (ms)
2.7
T
J
, TEMPERA
TURE (
°
C)
3.0
3.1
3.2
3.3
2.9
2.8
0
50
100
150
Figure 7. POR Delay vs. T
emperature, 60 k
W
Rdelay
−
50
POR DELA
Y (ms)
5.6
T
J
, TEMPERA
TURE (
°
C)
6.2
6.4
6.0
5.8
0
50
100
150
Figure 8. POR Delay vs. T
emperature, 120 k
W
Rdelay
Figure 9. Stability Region of Capacitive ESR vs.
Output Current
5 mA Load
25
°
C
60 k
W
Rdelay
Figure 10. W
akeup Period vs. T
emperature
120 k
W
Rdelay
0
ESR (
W
)
0.1
OUTPUT CURRENT (mA)
100
1000
10000
100
25
50
75
UNST
ABLE
REGION
ST
ABLE REGION,
ALL CAP V
ALUES
0.1
m
F UNST
ABLE
100
m
F
0.1
−
10
m
F
1
10
−
50
W
AKEUP PERIOD (ms)
23
T
J
, TEMPERA
TURE (
°
C)
25
26
27
24
0
50
100
150
60 k
W
Rdelay
NCV8518
http://onsemi.com
9
TYPICAL PERFORMANCE CHARACTERISTICS
W
AKEUP PERIOD (ms)
RDelay (k
W
)
POR DELA
Y (ms)
Figure 1
1. Wakeup Period vs. RDelay
Figure 12. POR Delay vs. RDelay
0
OUTPUT VOL
T
AGE (V)
0
INPUT VOL
T
AGE (V)
12
3
4
0
V
OUT
TRANSIENT (mV)
0
SWITCHING CURRENT (mA)
50
100
150
200
Figure 13. Output V
oltage vs. Input V
oltage,
5 mA Load
Figure 14. Load T
ransient Response
6
1
2
3
4
5
6
250
10
20
30
40
50
60
100
m
F
, 0.12 ESR
−
40
°
C
0
DROPOUT VOL
T
AGE (mV)
0
LOAD CURRENT (mA)
50
100
150
0
QUIESCENT CURRENT (
m
A)
LOAD CURRENT (mA)
50
Figure 15. Dropout V
oltage vs. Output Current
Figure 16. Quiescent Current vs. Output Current
100
200
300
400
700
125
°
C
25
°
C
150
96
98
102
−
40
°
C
125
°
C
25
°
C
100
104
5
22
m
F
, 0.20 ESR
4.7
m
F
, 0.32 ESR
500
600
100
0
50
100
150
200
250
0
100
200
300
400
500
0
5
10
15
20
25
30
0
100
200
300
400
500
RDelay (k
W
)
P1-P3
P4-P6
P7-P9
P10-P12
NCV8518PDG
Mfr. #:
Buy NCV8518PDG
Manufacturer:
ON Semiconductor
Description:
IC REG LINEAR 5V 250MA 8SOIC
Lifecycle:
New from this manufacturer.
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