LE25U20AMB
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19
Figure 21 Erase Flowcharts
Start
05h
Set status register read
command
Set small sector erase
command
Address 1
Address 2
Start erase on rising
edge of
CS
End of erase
Bit 0 = “0” ?
YES
Small sector erase
Address 3
06h
Write enable
D7h/20h
NO
* Automatically placed in write disabled
state at the end of the erase
Start
05h
Set status register read
command
Set sector erase
command
Address 1
Address 2
Start erase on rising
edge of
CS
End of erase
Bit 0 = “0” ?
YES
Sector erase
Address 3
06h
Write enable
D8h
NO
* Automatically placed in write disabled
state at the end of the erase
LE25U20AMB
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20
Figure 22 Page Program Flowchart
Start
05h
Set status register read
command
Set chip erase
command
Start erase on rising edge
of
CS
End of erase
Bit 0 = “0” ?
YES
Chip erase
06h
Write enable
C7h
NO
* Automatically placed in write disabled state at
the end of the erase
Page program
Start
05h
Set status register read
command
Set page program
command
Address 1
Address 2
Start program on rising
edge of
CS
End of
programming
YES
Bit 0= “0” ?
Address 3
06h
Write enable
02h
NO
* Automatically placed in write disabled state at
the end of the programming operation.
Data 0
Data n
LE25U20AMB
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21
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ORDERING INFORMATION
Device Package Shipping (Qty / Packing)
LE25U20AMB-AH
SOIC-8 / SOP8K (200 mil)
(Pb-Free / Halogen Free)
2000 / Tape & Reel
† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF

LE25U20AMB-AH

Mfr. #:
Manufacturer:
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Description:
NOR Flash S-FLASH MEMORY(2M)
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