IDT8L3010I Data Sheet CRYSTAL OR DIFFERNTIALTO LVCMOS/LVTTL CLOCK BUFFER
IDT8L3010ANLGI REVISION A JANUARY 12, 2012 2 ©2012 Integrated Device Technology, Inc.
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Number Name Type Description
1, 3, 5, 7, 8,
17, 18, 20, 22, 24
Q0, Q1, Q2, Q3, Q4
Q5, Q6, Q7, Q8, Q9
Output Single-ended clock outputs. LVCMOS/LVTTL interface levels.
2, 6, 19, 23 V
DDO
Power Output supply pins.
4, 9, 16,
21, 25, 32
GNDO Power Power supply output ground.
15, 26 GND Power Power supply core ground.
10 V
DD
Power Power supply pin.
11,
12
XTAL_IN,
XTAL_OUT
Input
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the
output.
13 CLK0 Input Pulldown Non-inverting differential clock.
14 nCLK0 Input
Pullup/
Pulldown
Inverting differential clock. Internal resistor bias to V
DD
/2.
27 nCLK1 Input
Pullup/
Pulldown
Inverting differential clock. Internal resistor bias to V
DD
/2.
28 CLK1 Input Pulldown Non-inverting differential clock.
29, 30 SEL1, SEL0 Input Pulldown
Input clock selection. LVCMOS/LVTTL interface levels.
See Table 3A.
31 OE Input Pulldown Output enable. LVCMOS/LVTTL interface levels. See Table 3B.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4pF
R
PULLDOWN
Input Pulldown Resistor 51 k
R
PULLUP
Input Pullup Resistor 51 k
C
PD
Power Dissipation Capacitance
(per output)
V
DDO
= 3.465V 13 pF
V
DDO
= 2.625V 12 pF
V
DDO
= 2V 10 pF
V
DDO
= 1.65V 9 pF
R
OUT
Output Impedance
V
DDO
= 3.3V ± 5% 14
V
DDO
= 2.5V ± 5% 17
V
DDO
= 1.8V ± 0.2V 30
V
DDO
= 1.5V ± 0.15V 55
