13
640212fa
LT6402-12
can also be used, but since it is being driven differentially
it will appear at each fi ltered output as a single-ended
capacitance of twice the value. To halve the fi lter band-
width, for example, two 42pF capacitors could be added
(one from each fi ltered output to ground). Alternatively
one 21pF capacitor could be added between the fi ltered
outputs, again halving the fi lter bandwidth. Combinations
of capacitors could be used as well; a three capacitor
solution of 14pF from each fi ltered output to ground plus
a 14pF capacitor between the fi ltered outputs would also
halve the fi lter bandwidth (Figure 7).
Bandpass fi ltering is also easily implemented with just a
few external components. An additional 560pF and 62nH,
each added differentially between +OUTFILTERED and
–OUTFILTERED creates a bandpass fi lter with a 26MHz
center frequency, –3dB points of 23MHz and 30MHz, and
1.6dB of insertion loss (Figure 8).
Output Common Mode Adjustment
The LT6402-12’s output common mode voltage is set by the
V
OCM
pin. It is a high-impedance input, capable of setting
the output common mode voltage anywhere in a range
from 1.1V to 3.6V. Bandwidth of the V
OCM
pin is typically
200MHz, so for applications where the V
OCM
pin is tied to
a DC bias voltage, a 0.1μF capacitor at this pin is recom-
mended. For best distortion performance, the voltage at
the V
OCM
pin should be between 1.2V and 2.6V.
When interfacing with most ADCs, there is generally a
V
OCM
output pin that is at about half of the supply voltage
of the ADC. For 5V ADCs such as the LTC17XX family, this
V
OCM
output pin should be connected directly (with the
addition of a 0.1μF capacitor) to the input V
OCM
pin of the
LT6402-12. For 3V ADCs such as the LTC22XX families,
the LT6402-12 will function properly using the 1.65V from
the ADC’s V
CM
reference pin, but improved Spurious Free
Dynamic Range (SFDR) and distortion performance can
be achieved by level-shifting the LTC22XX’s V
CM
reference
voltage up to at least 1.8V. This can be accomplished as
shown in Figure 9 by using a resistor divider between the
LTC22XX’s V
CM
output pin and V
CC
and then bypassing
the LT6402-12’s V
OCM
pin with a 0.1μF capacitor. For a
common mode voltage above 1.9V, AC coupling capacitors
are recommended between the LT6402-12 and LTC22XX
ADCs because of the input voltage range constraints of
the ADC.
Figure 7. LT6402-12 Internal Filter Topology Modifi ed
for 1/2x Filter Bandwidth (3 External Capacitors)
Figure 8. LT6402-12 Output Filter Modifi ed for Bandpass
Filtering (1 External Inductor, 1 External Capacitor)
Figure 9. Level Shifting 3V ADC V
CM
Voltage for
Improved SFDR
APPLICATIONS INFORMATION
V
EE
V
EE
640212 F07
50Ω
14pF
LT6402-12
–OUT
+OUT
50Ω
14pF
14pF
14pF
14pF
14pF
–OUTFILTERED
+OUTFILTERED
8
7
6
5
FILTERED OUTPUT
(37.5MHz)
V
EE
V
EE
640212 F08
50Ω
14pF
LT6402-12
–OUT
+OUT
50Ω
14pF
14pF
–OUTFILTERED
+OUTFILTERED
8
7
6
5
FILTERED OUTPUT
640212 F09
IF IN
LT6402-12
–INA
–INB
V
OCM
2
31
6
7
1
2
+INB
+INA
14
13
15
150Ω
16
10Ω
10Ω
LTC22xx
0.1μF
0.1μF
+OUTFILTERED
–OUTFILTERED
AIN
+
AIN
4.02k
11k
1.9V
1.5V
3V
V
CM
LT6402-12
14
640212fa
Large Output Voltage Swings
The LT6402-12 has been designed to provide the 3.2V
P-
P
output swing needed by the LTC1748 family of 14-bit
low-noise ADCs. This additional output swing improves
system SNR by up to 4dB.
Input Bias Voltage and Bias Current
The input pins of the LT6402-12 are internally biased to
the voltage applied to the V
OCM
pin. No external biasing
resistors are needed, even for AC-coupled operation. The
input bias current is determined by the voltage difference
between the input common mode voltage and the V
OCM
pin (which sets the output common mode voltage). For
example, if the inputs are tied to 2.5V with the V
OCM
pin
at 2.2V, then a total input bias current of 2mA will fl ow
into the LT6402-12’s +INA and +INB pins. Furthermore,
an additional input bias current totaling 2mA will fl ow into
the –INA and –INB inputs.
Application (Demo) Boards
The DC954A Demo Board has been created for stand-alone
evaluation of the LT6402-12 with either single-ended or
differential input and output signals. As shown, it accepts
a single-ended input and produces a single-ended output
so that the LT6402-12 can be evaluated using standard
laboratory test equipment. For more information on this
Demo Board, please refer to the layout and schematic
diagrams found later in this data sheet.
There are also additional demo boards available that
combine the LT6402-12 with a variety of different Linear
Technology ADCs. Please contact the factory for more
information on these demo boards.
Top Silkscreen
APPLICATIONS INFORMATION
TYPICAL APPLICATION
15
640212fa
LT6402-12
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
3.00 ± 0.10
(4 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.45 ± 0.05
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.45 ± 0.10
(4-SIDES)
0.75 ± 0.05
R = 0.115
TYP
0.25 ± 0.05
1
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
15 16
2
0.50 BSC
0.200 REF
2.10 ± 0.05
3.50 ± 0.05
0.70 ±0.05
0.00 – 0.05
(UD16) QFN 0904
0.25 ±0.05
0.50 BSC
PACKAGE OUTLINE
PACKAGE DESCRIPTION

LT6402IUD-12#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers 300MHz L Dist, L N Diff Amp/ADC Drvr (AV
Lifecycle:
New from this manufacturer.
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