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LT6402IUD-12#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
7
640212fa
LT6402-12
Noise Figure vs Frequency
Input Referred Noise Voltage
vs Frequency
Reverse Isolation vs Frequency
Differential Input Impedance
vs Frequency
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Output Impedance
vs Frequency
Input Refl ection Coeffi cient
vs Frequency
Output Refl ection Coeffi cient
vs Frequency
PSRR, CMRR vs Frequency
Small-Signal Transient Response
FREQUENCY (MHz)
10
0
NOISE FIGURE (dB)
5
10
15
20
30
100 1000
640212 G13
25
MEASURED USING
DC954 DEMO BOARD
FREQUENCY (MHz)
10
0
INPUT REFERRED NOISE VOLTAGE (nV/√Hz)
2
4
6
8
12
100 1000
640212 G14
10
FREQUENCY (MHz)
1
–60
ISOLATION (dB)
–50
–40
–30
–20
10 100 1000
640212 G15
–70
–80
–90
–110
–100
–10
0
UNFILTERED OUTPUTS
FREQUENCY (MHz)
1
100
INPUT IMPEDANCE (MAGNITUDE Ω, PHASE DEGREES)
200
300
10 100 1000
640212 G16
0
50
150
250
–50
–100
IMPEDANCE
MAGNITUDE
IMPEDANCE
PHASE
FREQUENCY (MHz)
10
1
OUTPUT IMPEDANCE (Ω)
10
100
100 1000
64206 G17
UNFILTERED OUTPUTS
FREQUENCY (MHz)
1
–20
INPUT REFLECTION COEFFICIENT (S11)
–10
0
10 100 1000
640212 G18
–30
–25
–15
–5
–35
–40
MEASURED USING
DC954 DEMO BOARD
FREQUENCY (MHz)
1
–20
OUTPUT REFLECTION COEFFICIENT (S22)
–10
0
10 100 1000
640212 G19
–30
–25
–15
–5
–35
–40
MEASURED USING
DC954 DEMO BOARD
FREQUENCY (MHz)
1
40
PSRR, CMRR (dB)
60
50
70
80
10 100 1000
640212 G20
20
10
30
0
120
110
100
90
UNFILTERED OUTPUTS
PSRR
CMRR
TIME (5ns/DIV)
OUTPUT VOLTAGE (V)
2.220
2.240
2.260
640212 G21
2.180
2.120
2.280
2.200
2.160
2.140
LT6402-12
8
640212fa
TYPICAL PERFORMANCE CHARACTERISTICS
Large-Signal Transient Response
Overdrive Recovery Time
Distortion vs Output Common
Mode Voltage, LT6402-12 Driving
an LTC2249 14-Bit ADC
Turn-Off Time
Turn-On Time
10MHz 8192 Point FFT, LT6402-12
Driving an LTC2249 14-Bit ADC
20MHz 8192 Point FFT, LT6402-12
Driving an LTC2249 14-Bit ADC
25MHz 8192 Point FFT, LT6402-12
Driving an LTC2249 14-Bit ADC
20MHz 2-Tone 32768 Point FFT,
LT6402-12 Driving an LTC2249
14-Bit ADC
TIME (10ns/DIV)
OUTPUT VOLTAGE (V)
2.7
3.2
3.7
640212 G22
2.2
1.7
1.2
R
LOAD
= 100Ω PER OUTPUT
TIME (25ns/DIV)
OUTPUT VOLTAGE (V)
2.0
2.5
3.0
640212 G23
1.5
1.0
0
0.5
4.0
3.5
+OUT
–OUT
R
LOAD
= 100Ω
PER OUTPUT
OUTPUT COMMON MODE VOLTAGE (V)
1
DISTORTION (dBc)
–80
–75
–70
1.6 2.0
640212 G24
–85
–90
1.2 1.4
1.8
HD3
HD2
2.2 2.4
–95
–100
FILTERED OUTPUTS
NO R
LOAD
V
OUT
= 20MHz 2V
P-P
TIME (125ns/DIV)
VOLTAGE (V)
2.0
3.0
640212 G25
1.0
0
4.0
1.5
2.5
0.5
3.5
+OUT
–OUT
ENABLE
R
LOAD
= 100Ω
PER OUTPUT
TIME (250ns/DIV)
VOLTAGE (V)
2.0
3.0
640212 G26
1.0
0
+OUT
–OUT
ENABLE
1.5
2.5
0.5
3.5
4.0
R
LOAD
= 100Ω PER OUTPUT
FREQUENCY (MHz)
0
–140
AMPLITUDE (dBFS)
–120
–100
–80
0
–40
4
8
10 18
–20
–60
–130
–110
–90
–10
–50
–30
–70
26
12
14
16
20
640212 G27
8192 POINT FFT
f
IN
= 10MHz, –1dBFS
FILTERED OUTPUTS
FREQUENCY (MHz)
0
–140
AMPLITUDE (dBFS)
–120
–100
–80
0
–40
4
8
10 18
–20
–60
–130
–110
–90
–10
–50
–30
–70
26
12
14
16
20
640212 G28
8192 POINT FFT
f
IN
= 20MHz, –1dBFS
FILTERED OUTPUTS
FREQUENCY (MHz)
0
–140
AMPLITUDE (dBFS)
–120
–100
–80
0
–40
4
8
10 18
–20
–60
–130
–110
–90
–10
–50
–30
–70
26
12
14
16
20
640212 G29
8192 POINT FFT
f
IN
= 25MHz, –1dBFS
FILTERED OUTPUTS
FREQUENCY (MHz)
0
–140
AMPLITUDE (dBFS)
–120
–100
–80
0
–40
510 20
–20
–60
–130
–110
–90
–10
–50
–30
–70
2.5 7.5 12.5 15 17.5
22.5
640212 G30
32768 POINT FFT
TONE 1 AT 19.5MHz, –7dBFS
TONE 2 AT 20.5MHz, –7dBFS
FILTERED OUTPUTS
9
640212fa
LT6402-12
V
OCM
(Pin 2): This pin sets the output common mode
voltage. Without additional biasing, both inputs bias to
this voltage as well. This input is high impedance.
V
CCA
, V
CCB
, V
CCC
(Pins 3, 10, 1): Positive Power Supply
(Normally Tied to 5V). All three pins must be tied to the
same voltage. Bypass each pin with 1000pF and 0.1μF
capacitors as close to the package as possible. Split
supplies are possible as long as the voltage between V
CC
and V
EE
is 5V.
V
EEA
, V
EEB
, V
EEC
(Pins 4, 9, 12): Negative Power Supply
(Normally Tied to Ground). All three pins must be tied to
the same voltage. Split supplies are possible as long as
the voltage between V
CC
and V
EE
is 5V. If these pins are
not tied to ground, bypass each pin with 1000pF and 0.1μF
capacitors as close to the package as possible.
+OUT, –OUT (Pins 5, 8): Outputs (Unfi ltered). These pins
are high bandwidth, low-impedance outputs. The DC
output voltage at these pins is set to the voltage applied
at V
OCM
.
+OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered
Outputs. These pins add a series 50Ω resistor from the
unfi ltered outputs and three 14pF capacitors. Each output
has 14pF to V
EE
, plus an additional 14pF between each pin
(See the Block Diagram). This fi lter has a –3dB bandwidth
of 75MHz.
ENABLE (Pin 11): This pin is a TTL logic input referenced
to the V
EEC
pin. If low, the LT6402-12 is enabled and draws
typically 30mA of supply current. If high, the LT6402-12
is disabled and draws typically 250μA.
+INA, +INB (Pins 15, 16): Positive Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the V
OCM
pin.
–INA, –INB (Pins 14, 13): Negative Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the V
OCM
pin.
Exposed Pad (Pin 17): Tie the pad to V
EEC
(Pin 12). If split
supplies are used, DO NOT tie the pad to ground.
PIN FUNCTIONS
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

LT6402IUD-12#TRPBF

Mfr. #:
Buy LT6402IUD-12#TRPBF
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers 300MHz L Dist, L N Diff Amp/ADC Drvr (AV
Lifecycle:
New from this manufacturer.
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