LTC3603
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applications inForMation
The basic LTC3603 application circuit is shown on the front
page of this data sheet. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by C
IN
and C
OUT
.
Operating Frequency
Selection of the operating frequency is a trade-off between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequencies improves efficiency by
reducing internal gate charge and switching losses but
requires larger inductance values and/or capacitance to
maintain low output ripple voltage. The operating frequency
of the LTC3603 is determined by an external resistor that is
connected between the RT pin and ground. The value of the
resistor sets the ramp current that is used to charge and
discharge an internal timing capacitor within the oscillator
and can be calculated by using the following equation:
R
OSC
=
1.15 10
11
f(Hz)
10k
Although frequencies as high as 3MHz are possible, the
minimum on-time of the LTC3603 imposes a minimum
limit on the operating duty cycle. The minimum on-time
is typically 95ns. Therefore, the minimum duty cycle is
equal to 100 • 95ns • f(Hz).
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current DI
L
increases with higher V
IN
and decreases
with higher inductance.
ΔI
L
=
V
OUT
fL
1–
V
OUT
V
IN
Having a lower ripple current reduces the ESR losses
in the output capacitors and the output voltage ripple.
Highest efficiency operation is achieved at low frequency
with small ripple current. This, however, requires a large
inductor.
A reasonable starting point for selecting the ripple current
is DI
L
= 0.4(I
MAX
), where I
MAX
is the maximum output
current. The largest ripple current occurs at the highest
V
IN
. To guarantee that the ripple current stays below a
specified maximum, the inductor value should be chosen
according to the following equation:
L =
V
OUT
fΔI
L(MAX)
1–
V
OUT
V
IN(MAX)
The inductor value will also have an effect on Burst Mode
operation. The transition from low current operation
begins when the peak inductor current falls below a level
set by the burst clamp. Lower inductor values result in
higher ripple current which causes this to occur at lower
load currents. This causes a dip in efficiency in the upper
range of low current operation. In Burst Mode operation,
lower inductance values will cause the burst frequency
to increase.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but it is very dependent on the inductance selected.
As the inductance increases, core losses decrease. Un
-
fortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
Ferrite designs have ver
y low core losses and are pre
-
ferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core
material saturates hard, which means that
inductance collapses abruptly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Different core materials and shapes will change the
size/current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy ma
-
terials are small and do not radiate energy but generally
cost more than powdered iron core inductors with similar
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characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
Toko and Sumida.
C
IN
and C
OUT
Selection
The input capacitance, C
IN
, is needed to filter the trapezoidal
current at the source of the top MOSFET. To prevent large
ripple voltage, a low ESR input capacitor sized for the
maximum RMS current should be used. RMS current is
given by:
I
RMS
= I
OUT(MAX)
V
OUT
V
IN
V
IN
V
OUT
1
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple current
ratings from capacitor manufacturers are often based
on only 2000 hours of life which makes it advisable to
further derate the capacitor, or choose a capacitor rated
at a higher temperature than required. Several capacitors
may also be paralleled to meet size or height requirements
in the design.
The selection of C
OUT
is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, DV
OUT
, is determined by:
ΔV
OUT
ΔI
L
ESR+
1
8fC
OUT
The output ripple is highest at maximum input voltage
since DI
L
increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long-term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a high
voltage coefficient and audible piezoelectric effects. The
high Q of ceramic capacitors with trace inductance can
also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
V
IN
. At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause a
voltage spike at V
IN
large enough to damage the part.
Output Voltage Programming
The output voltage is set by an external resistive divider
according to the following equation:
V
OUT
= 0.6V 1+
R2
R1
The resistive divider allows the V
FB
pin to sense a fraction
of the output voltage as shown in Figure 1.
R2
LTC3603
R1
3603 F01
SGND
V
FB
V
OUT
Figure 1. Setting the Output Voltage
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Burst Clamp Programming
If the voltage on the SYNC/MODE pin is in the range of
0.42V to 1V, Burst Mode operation is enabled. During
Burst Mode operation, the voltage on the SYNC/MODE
pin determines the burst clamp level. This level sets the
minimum peak inductor current, I
BURST
, for each switching
cycle according to the following equation:
V
BURST
=
I
BURST
6A/V
+ 0.42V
V
BURST
is the voltage on the SYNC/MODE pin. I
BURST
can be programmed in the range of 0A to 3.5A, which
corresponds to a V
BURST
range of 0.42V to 1V. As the output
load current drops, the peak inductor current decreases
to keep the output voltage in regulation. When the output
load current demands a peak inductor current that is less
than I
BURST
, the burst clamp will force the peak inductor
current to remain equal to I
BURST
regardless of further
reductions in the load current. Since the average inductor
current is therefore greater than the output load current,
the voltage on the ITH pin will decrease. When the I
TH
voltage drops to 330mV, sleep mode is enabled in which
both power MOSFETs are shut off along with most of the
circuitry to minimize power consumption. All circuitry is
turned back on and the power MOSFETs begin switching
again when the output voltage drops out of regulation. The
value for I
BURST
is determined by the desired amount of
output voltage ripple. As the value of I
BURST
increases, the
sleep time between pulses and the output voltage ripple
increases. The burst clamp voltage, V
BURST
, can be set
by a resistor divider from the INTV
CC
pin. Alternatively,
the SYNC/MODE pin may be tied directly to the V
FB
pin to
set V
BURST
= 0.6V (I
BURST
= 1A), or through an additional
divider resistor (R3) to set V
BURST
= 0.42V to 0.6V (see
Figure 2).
Pulse skipping, which is a compromise between low output
voltage ripple and efficiency, can be implemented by con
-
necting the SYNC/MODE pin to ground. This sets I
BURST
to
0A. In this condition, the peak inductor current is limited by
the minimum on-time of the current comparator and the
lowest output voltage ripple is achieved while still operat
-
ing discontinuously. During very light output loads, pulse
skipping allows only a few switching cycles to be skipped
while maintaining
the output voltage in regulation.
Frequency Synchronization
The LTC3603’s internal oscillator can be synchronized to
an external 5V clock signal. During synchronization, the
top MOSFET turn-on is locked to the falling edge of the
external frequency source. The synchronization frequency
range is 300kHz to 3MHz. Synchronization only occurs if
the external frequency is greater than the frequency set by
the R
T
resistor. Because slope compensation is generated
by the oscillators internal ramp, the external frequency
should be set 25% higher than the frequency set by the
R
T
resistor to ensure that adequate slope compensation
is present. When synchronized, the LTC3603 will operate
in pulse-skipping mode. Do not allow the SYNC/MODE
pin to float when the external clock signal is not active.
In some cases, a pull-down resistor on SYNC/MODE may
be needed to avoid this.
INTV
CC
Regulator
The LTC3603 features an integrated P-channel low dropout
linear regulator (LDO) that supplies power to the INTV
CC
supply pin from the PV
IN
pin. This LDO supply has been
designed to deliver up to 35mA of load current for the
powering of the internal gate drivers and other internal
circuitry. A small external load may also be applied provided
that the total current from the INTV
CC
supply does not
exceed 35mA. The INTV
CC
pin should be bypassed with
no less than a 0.22µF ceramic capacitor. A 1µF ceramic
capacitor is suitable for most applications.
Topside MOSFET Driver Supply (BOOST Pin)
The LTC3603 uses a bootstrapped supply to power the
gate of the internal topside MOSFET (Figure 3). When the
topside MOSFET is off and the SW pin is low, diode D
BST
charges capacitor C
BST
to the voltage on the INTV
CC
supply.
R2
R2
LTC3603
R1
SYNC/MODE
SGND
INTV
CC
R3 (OPTIONAL)
LTC3603
R1
3603 F02
SYNC/MODE
SGND
FB
V
OUT
V
BURST
= 0.42V TO 1V V
BURST
= 0.42V TO 0.6V
Figure 2. Programing the Burst Clamp

LTC3603EUF#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2.5A, 15V Mono Sync Buck Reg
Lifecycle:
New from this manufacturer.
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