© Semiconductor Components Industries, LLC, 2012
February, 2012 Rev. 3
1 Publication Order Number:
NCP3155/D
NCP3155A, NCP3155B
3 A Synchronous Buck
Regulator
The NCP3155 is a DC/DC synchronous switching regulator with
fully integrated power switches and full fault protection. The
switching frequency of 1 MHz and 500 kHz allows the use of small
filter components, which results in smaller board space and reduced
BOM cost. Available in a SOIC-8 package.
Features
Input Voltage Range from 4.7 V to 24 V
Adjustable Output Voltage
1 MHz Operation (NCP3155A – 500 kHz)
Internally Programmed 1.2 ms SoftStart (NCP3155A – 2.4 ms)
0.8 ± 1.0% Reference Voltage
48 mW HSFET and 18 mW LSFET
Current Limit Protection
Transconductance Amplifier with External Compensation
Input Undervoltage Lockout
Output Overvoltage and Undervoltage Detection
These are PbFree Devices
Typical Applications
Set Top Boxes
DVD Drives and HDD
LCD Monitors and TVs
Cable Modems
Telecom/Networking/Datacom Equipment
Figure 1. Typical Application Circuit
NCP3155
FB1
4.7 V 24 V
BST
VSW
PGND
AGND
ISET
COMP
V
IN
V
OUT
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SOIC8 NB
CASE 751
MARKING DIAGRAM
3155x
ALYW
G
1
8
1
8
PIN CONNECTIONS
FBCOMP
AGNDBST
ISETV
IN
V
SW
PGND
(Top View)
Device Package Shipping
ORDERING INFORMATION
NCP3155ADR2G SOIC8
(PbFree)
2500 / Tape & Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
NCP3155BDR2G SOIC8
(PbFree)
2500 / Tape & Reel
3155x = Specific Device Code
x = A or B
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
NCP3155A, NCP3155B
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2
GATE
DRIVE
LOGIC
VC
CLK/
DMAX/
SOFT
START
OOV
BOOST
ACTIVE
LEVEL
SHIFT
SAMPLE &
HOLD
VC
HSDRV
PGND
AGND
+
+
+
VIN
COMP
FB
REF
RAMP
OSCILLATOR
BST
VSW
VIN
Figure 2. NCP3155 Block Diagram
INTERNAL BIAS
ISET
1.5 V
THERMAL SD
POR/STARTUP
OUV
CURRENT
LIMIT
VIN
ISET
LSDRV
PIN FUNCTION DESCRIPTION
Pin Pin Name Description
1 PGND The PGND pin is the high current ground pin for the lower MOSFET and drivers which should be soldered to a
large copper area to reduce thermal resistance.
2 V
IN
The V
IN
pin powers the internal control circuitry and is monitored by an undervoltage comparator. The V
IN
pin
is also connected to the internal power NMOS switch. It is also used in conjunction with the V
SW
pin to sense
current in the high side MOSFET. The V
IN
pin has high dI/dt edges and must be decoupled to PGND pin close
to the pin of the device.
3 BST Supply rail for the floating top gate driver. Connect a capacitor (CBST) between this pin and the V
SW
pin. Typ-
ical values for CBST range from 1 nF to 100 nF.
4 COMP Compensation pin. The comp pin is the output of the transconductance amplifier and the noninverting input of
the PWM comparator. The comp pin in conjunction with the FB pin are used to compensate the voltagecontrol
feedback loop.
5 FB Inverting input to the Operational Transconductance Amplifier (OTA). The FB pin in conjunction with the extern-
al compensation serves to stabilize and achieve the desired output voltage with voltage mode compensation.
6 AGND The AGND pin serves as smallsignal ground. All smallsignal ground paths should connect to the AGND pin
at a single point to avoid any high current ground returns.
7 ISET Bottom gate MOSFET driver pin and the internal current set pin. Place a resistor to ground to set the current
limit of the converter.
8 V
SW
The V
SW
pin is the connection of the drain and source of the internal N MOSFETS. The V
SW
pin swings from
V
IN
when the high side switch is on to small negative voltages when the low side switch is on with high dV/dt
transitions.
NCP3155A, NCP3155B
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3
ABSOLUTE MAXIMUM RATINGS (measured vs. GND pin 8, unless otherwise noted)
Rating
Symbol V
MAX
V
MIN
Unit
Main Supply Voltage Input V
CC
26.4 0.3 V
Boost to V
SW
differential voltage BSTV
SW
13.2 0.3 V
High Side Drive Boost Pin BST 45 0.3 V
Switch Voltage Node V
SW
30 0.6 V
Transconductance Amplifier Output COMP 5.5 0.3 V
Feedback FB 6.0 0.3 V
Current Limit Set ISET 13.2 0.3 V
Operating Junction Temperature Range (Note 1) T
J
40 to +125 °C
Maximum Junction Temperature T
J(MAX)
+150 °C
Storage Temperature Range T
stg
55 to +150 °C
Thermal Characteristics SOIC8 Package (Note 2)
Thermal Resistance JunctiontoAir (Note 3)
R
q
JA
110
170
°C/W
Lead Temperature Soldering (10 sec):
Reflow (SMD styles only) PbFree (Note 3)
R
F
260 Peak °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The maximum package power dissipation limit must not be exceeded.
P
D
+
T
J(max)
* T
A
R
qJA
2. The value of q
JA
is measured with the device mounted on 1 in2 FR*4 board with 1 oz. copper, in a still air environment with T
A
= 25°C. The
value in any given application depends on the user’s specific board design.
3. The value of q
JA
is measured with the device mounted on minimum footprint, in a still air environment with T
A
= 25°C. The value in any given
application depends on the user’s specific board design.

NCP3155ADR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC REG BUCK ADJUSTABLE 3A 8SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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