R8C/36T-A Group 4. Electrical Characteristics
R01DS0055EJ0100 Rev.1.00 Page 49 of 58
Dec 09, 2011
4.5 AC Characteristics
Note:
1. 1t
CYC = 1/f1 (s)
Table 4.20 Timing Requirements of Clock Synchronous Serial I/O with Chip Select
(during Master Operation)
(Measurement conditions: Vcc = 1.8 V to 5.5 V, Topr = 20°C to 85°C (N version)/
40°C to 85°C (D version))
Symbol Parameter Conditions
Standard
Unit
Min. Typ. Max.
t
SUCYC SSCK clock cycle time 4.00 ――
t
CYC
(1)
tHI SSCK clock high width 0.40 0.60 tSUCYC
tLO SSCK clock low width 0.40 0.60 tSUCYC
tRISE SSCK clock rising time 2.7 V Vcc 5.5 V ――0.50
t
CYC
(1)
1.8 V Vcc 2.7 V ――1.00
t
CYC
(1)
tFALL SSCK clock falling time 2.7 V Vcc 5.5 V ――0.50
t
CYC
(1)
1.8 V Vcc 2.7 V ――1.00
t
CYC
(1)
tSU SSI, SSO data input setup time 4.5 V Vcc 5.5 V 60 ――ns
2.7 V
Vcc 4.5 V 70 ――ns
1.8 V
Vcc 2.7 V 100 ――ns
t
H SSI, SSO data input hold time 2.7 V Vcc 5.5 V 2.00 ――
t
CYC
(1)
1.8 V Vcc 2.7 V 2.00 ――
t
CYC
(1)
tLEAD
SCS-SCK output delay time
0.5 t
SUCYC - 1 tCYC ――ns
t
LAG
SCK -SCS output valid time
0.5 t
SUCYC - 1 tCYC ――ns
t
OD SSO data output delay time 2.7 V Vcc 5.5 V ――30.00 ns
1.8 V
Vcc 2.7 V ――1.00
t
CYC
(1)
R8C/36T-A Group 4. Electrical Characteristics
R01DS0055EJ0100 Rev.1.00 Page 50 of 58
Dec 09, 2011
Note:
1. 1t
CYC = 1/f1 (s)
Table 4.21 Timing Requirements of Clock Synchronous Serial I/O with Chip Select
(during Slave Operation)
(Measurement conditions: Vcc = 1.8 V to 5.5 V, Topr = 20°C to 85°C (N version)/
40°C to 85°C (D version))
Symbol Parameter Conditions
Standard
Unit
Min. Typ. Max.
t
SUCYC SSCK clock cycle time 4.00 ――
t
CYC
(1)
tHI SSCK clock high width 0.40 0.60 tSUCYC
tLO SSCK clock low width 0.40 0.60 tSUCYC
tRISE SSCK clock rising time ―― 1.00 μs
t
FALL SSCK clock falling time ―― 1.00 μs
t
SU SSO data input setup time 10.00 ――ns
t
H SSO data input hold time 2.00 ――
t
CYC
(1)
tLEAD
SCS setup time
1t
CYC + 50 ――ns
t
LAG
SCS hold time
1t
CYC + 50 ――ns
t
OD SSI, SSO data output delay time 4.5 V Vcc 5.5 V ―― 60 ns
2.7 V
Vcc 4.5 V ―― 70 ns
1.8 V
Vcc 2.7 V ――100.00 ns
t
SA SSI slave access time 2.7 V Vcc 5.5 V ――1.5tCYC + 100 ns
1.8 V
Vcc 2.7 V ――1.5tCYC + 200 ns
t
OR SSI slave out open time 2.7 V Vcc 5.5 V ――1.5tCYC + 100 ns
1.8 V
Vcc 2.7 V ――1.5tCYC + 200 ns
R8C/36T-A Group 4. Electrical Characteristics
R01DS0055EJ0100 Rev.1.00 Page 51 of 58
Dec 09, 2011
Figure 4.4 I/O Timing of Synchronous Serial Communication Unit (SSU) (Master)
VIH or VOH
VIL or VOL
tHI
tLO
tHI
tFALL
tRISE
tLO tSUCYC
tOD
tH
tSU
SCS (output)
SSCK (output)
(CPOS = 1)
SSCK (output)
(CPOS = 0)
SSO (output)
SSI (input)
4-Wire Bus Communication Mode, Master, CPHS = 1
VIH or VOH
VIL or VOL
tHI
tLO
tHI
tFALL
tRISE
tLO tSUCYC
tOD
tH
tSU
SCS (output)
SSCK (output)
(CPOS = 1)
SSCK (output)
(CPOS = 0)
SSO (output)
SSI (input)
4-Wire Bus Communication Mode, Master, CPHS = 0
CPHS, CPOS: Bits in SIMR1 register
tLEAD
tLAG

R5F2136CSNFP#30

Mfr. #:
Manufacturer:
Renesas Electronics
Description:
16-bit Microcontrollers - MCU R8C/36TA 128+4K/10K 64LQFP
Lifecycle:
New from this manufacturer.
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