TEA1750_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 15 December 2008 4 of 29
NXP Semiconductors
TEA1750
GreenChip III SMPS control IC
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 2. Pin configuration for TEA1750T (SOT109-1)
TEA1750T
VCC HV
GND HVS
FBCTRL HVS
FBAUX FBDRIVER
LATCH PFCDRIVER
PFCCOMP PFCSENSE
VINSENSE FBSENSE
PFCAUX VOSENSE
014aaa015
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Table 2. Pin description
Symbol Pin Description
V
CC
1 supply voltage
GND 2 ground
FBCTRL 3 control input for flyback
FBAUX 4 input from auxiliary winding for demagnetization timing and
overvoltage protection for flyback
LATCH 5 general purpose protection input
PFCCOMP 6 frequency compensation pin for PFC
VINSENSE 7 sense input for mains voltage
PFCAUX 8 input from auxiliary winding for demagnetization timing for PFC
VOSENSE 9 sense input for PFC output voltage
FBSENSE 10 programmable current sense input for flyback
PFCSENSE 11 programmable current sense input for PFC
PFCDRIVER 12 gate driver output for PFC
FBDRIVER 13 gate driver output for flyback
HVS 14, 15 high voltage safety spacer, not connected
HV 16 high voltage start-up and valley sensing of flyback part
TEA1750_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 15 December 2008 5 of 29
NXP Semiconductors
TEA1750
GreenChip III SMPS control IC
7. Functional description
7.1 General control
The TEA1750 contains a controller for a power factor correction circuit as well as a
controller for a flyback circuit. A typical configuration is shown in Figure 3.
7.1.1 Start-up and undervoltage lock-out
Initially the capacitor on the V
CC
pin is charged from the high voltage mains via the HV pin.
As long as V
CC
is below V
trip
, the charge current is low. This protects the IC in case the
V
CC
pin is shorted to ground. For a short start-up time the charge current above V
trip
is
increased until V
CC
reaches V
th(UVLO)
. If V
CC
is between V
th(UVLO)
and V
startup
, the charge
current is low again, ensuring a low duty cycle during fault conditions.
The control logic activates the internal circuitry and switches off the charge current when
the voltage on pin V
CC
passes the V
startup
level. First, the LATCH pin output is activated
and the soft-start capacitors on the PFCSENSE and FBSENSE pins are charged. When
the LATCH pin voltage exceeds the V
en(LATCH)
voltage and the soft-start capacitor on the
PFCSENSE pin is charged, the PFC circuit is activated. The supply current from the
HV pin is then switched on again and the PFC circuit charges the C
bus
capacitor. When
the voltage on pin VOSENSE reaches the V
start(fb)
level, the charge current is switched off
and the flyback converter is activated (providing the soft-start capacitor on the FBSENSE
pin is charged). The output voltage of the flyback converter is then regulated to its nominal
output voltage. The IC supply is taken over by the auxiliary winding of the flyback
converter. See Figure 4.
Fig 3. Typical configuration of TEA1750
12 11 9 16 13
8
6
7
3
2
10
4
1
TEA1750T
014aaa016
TEA1750_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 15 December 2008 6 of 29
NXP Semiconductors
TEA1750
GreenChip III SMPS control IC
When the PFC is started, there is initially no supply take-over from the auxiliary winding.
To make a small V
CC
capacitor possible, the V
CC
voltage is regulated to the V
startup
level,
as long as the flyback converter has not yet started. Regulation is done by hysteretic
control with a limited (high level) charge current. The hysteresis is typically 300 mV.
If during start-up the LATCH pin does not reach the V
en(LATCH)
level before V
CC
reaches
V
th(UVLO)
, the LATCH pin output is de-activated and the charge current is switched on
again.
As soon as the flyback converter is started, the voltage on the FBCTRL pin is monitored. If
the output voltage of the flyback converter does not reach its intended regulation level in a
predefined time, the voltage on the FBCTRL pin reaches the V
to(FBCTRL)
level and an error
is assumed. The TEA1750 then initiates a safe restart.
When one of the protection functions is activated, both converters stop switching and the
V
CC
voltage drops to V
th(UVLO)
. A latched protection recharges the V
CC
capacitor via the
HV pin, but does not restart the converters. For a safe-restart protection, the capacitor is
recharged via the HV pin and the device restarts (see Figure 1)
In the event of an overvoltage protection of the PFC circuit
(V
I
on pin VOSENSE > V
ovp(VOSENSE)
), only the PFC controller stops switching until the
VOSENSE pin voltage drops below V
ovp(VOSENSE)
again. Also, if a mains undervoltage is
detected (V
I
on pin VINSENSE < V
stop(VINSENSE)
), only the PFC controller stops switching
until V
I
on pin VINSENSE > V
start(VINSENSE)
again.
When the voltage on pin V
CC
drops below the undervoltage lock-out level, both controllers
stop switching and re-enter the safe restart mode. In the safe restart mode the driver
outputs are disabled and the V
CC
pin voltage is recharged via the HV pin.

TEA1750T/N1/DG,518

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
AC/DC Converters 12V -80uA 125KHz
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet