TEA1750_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 15 December 2008 8 of 29
NXP Semiconductors
TEA1750
GreenChip III SMPS control IC
7.1.4 Fast latch reset
In a typical application, the mains can be interrupted briefly to reset the latched protection.
The PFC bus capacitor, C
bus
, does not have to discharge for this latched protection to
reset.
Typically the PFC bus capacitor, C
bus
, has to discharge for the V
CC
to drop to this reset
level. When the latched protection is set, the clamping circuit of the VINSENSE circuit is
disabled (see also Section 7.2.8). As soon as the VINSENSE voltage drops below
750 mV (typ) and then is raised to 870 mV (typ), the latched protection is reset.
The latched protection will also be reset by removing both the voltage on pin V
CC
and on
pin HV.
7.1.5 Overtemperature protection (OTP)
An accurate internal temperature protection is provided in the circuit. When the junction
temperature exceeds the thermal shutdown temperature, the IC only stops switching. As
long as OTP is active, the V
CC
capacitor is not recharged from the HV mains. The OTP
circuit is supplied from the HV pin if the V
CC
supply voltage is not sufficient.
OTP is a latched protection. It can be reset by removing both the voltage on pin V
CC
and
on pin HV or by the fast latch reset function, see Section 7.1.4
7.2 Power factor correction circuit
The power factor correction circuit operates in quasi-resonant or discontinuous conduction
mode with valley switching. The next primary stroke is only started when the previous
secondary stroke has ended and the voltage across the PFC MOSFET has reached a
minimum value. The voltage on the PFCAUX pin is used to detect transformer
demagnetization and the minimum voltage across the external PFC MOSFET switch.
7.2.1 t
on
control
The power factor correction circuit is operated in t
on
control. The resulting mains harmonic
reduction of a typical application is well within the class-D requirements.
7.2.2 Valley switching and demagnetization (PFCAUX pin)
The PFC MOSFET is switched on after the transformer is demagnetized. Internal circuitry
connected to the PFCAUX pin detects the end of the secondary stroke. It also detects the
voltage across the PFC MOSFET. The next stroke is started if the voltage across the PFC
MOSFET is at its minimum in order to reduce switching losses and electromagnetic
interference (EMI) (valley switching).
If no demagnetization signal is detected on the PFCAUX pin, the controller generates a
zero current signal (ZCS), 50 µs (typ) after the last PFC gate signal.
If no valley signal is detected on the PFCAUX pin, the controller generates a valley signal
4 µs (typ) after demagnetization was detected.
To protect the internal circuitry, for example during lightning events, it is advisable to add
a5kΩ series resistor to this pin. To prevent incorrect switching due to external
disturbance, the resistor should be placed close to the IC on the printed circuit board.
