LTC3035
6
3035f
The LTC3035 is a VLDO (very low dropout) linear regulator
which operates from input voltages between 1.7V and
5.5V. The LDO uses an internal NMOS transistor as the
pass device in a source-follower configuration. The inter-
nal charge pump generator provides the high supply
necessary for the LDO circuitry while the output current
comes directly from the IN input for high efficiency
regulation.
Charge Pump Operation
The LTC3035 contains a charge pump to produce the
necessary bias voltage supply for the LDO. The charge
pump utilizes Burst Mode operation to achieve high
efficiency for the relatively low current levels needed for
the LDO circuitry. The charge pump requires only a small
0.1µF flying capacitor between the CP and CM pins and a
1µF bypass capacitor at BIAS.
An internal oscillator centered at 800kHz controls the
two-phase switching cycle of the charge pump. During the
first phase a current source charges the flying capacitor
between V
IN
and GND. During the second phase, the
capacitor’s positive terminal connects to BIAS and the
current source drives the capacitor’s minus terminal,
delivering charge to the BIAS bypass capacitor and in-
creasing its voltage.
A burst comparator with hysteresis monitors the voltage
on the BIAS pin. When BIAS is above the upper threshold
of the comparator, the oscillator is disabled and no switch-
ing occurs. When BIAS falls below the comparator’s lower
threshold, the oscillator is enabled and the BIAS pin gets
charged. The thresholds of the burst comparator are
dynamically adjusted to maintain a DC level shown by
Figure 1. BIAS regulates to 1.9 • V
IN
or 5V, whichever
voltage is lower. The voltage ripple at BIAS is controlled to
approximately 1% of its DC value.
LDO Operation
An undervoltage lockout comparator (UVLO) senses the
BIAS voltage to ensure that the BIAS supply for the LDO is
greater than 90% of its regulation value before
enabling the LDO. Once the LDO gets enabled, the UVLO
threshold switches to 50% of its regulation value. Thus the
BIAS voltage must fall below 50% of its regulation voltage
Figure 1. LTC3035 BIAS Voltage vs V
IN
Voltage
(Refer to Block Diagram)
1.7 2.63
3.23
BIAS (V)
5
V
IN
(V)
5.5
3035 F01
1.9 • V
IN
before the LDO disables. When the LDO is disabled, OUT
is pulled to GND through the external divider and an
internal 2.5k resistor.
The LDO provides a high accuracy output capable of
supplying 300mA of output current with a typical dropout
voltage of only 45mV. A single ceramic capacitor as small
as 1µF is all that is required for output bypassing. The low
reference voltage allows the LTC3035 output to be
programmed from 0.4V to 3.6V.
As shown in the Block Diagram, the charge pump output
at BIAS supplies the LDO circuitry while the output current
comes directly from the IN input for high efficiency
regulation. The low quiescent supply current, I
IN
= 100µA,
drops to I
IN
= 1µA typical in shutdown making the LTC3035
an ideal choice for use in battery-powered systems.
The device also includes current limit, thermal overload
protection, and reverse output current protection. The fast
transient response of the follower output stage overcomes
the traditional tradeoff between dropout voltage, quies-
cent current and load transient response inherent in most
LDO regulator architectures. The LTC3035 also includes
overshoot detection circuitry which brings the output back
into regulation when going from heavy to light output
loads (see Figure 2).
The LTC3035 also includes a soft-start feature to prevent
excessive current flow during start-up. After the BIAS
voltage reaches regulation, the soft-start circuitry gradu-
ally increases the LDO reference voltage from 0V to 0.4V
over a period of about 600µs. There is a short 700µs delay
from the time BIAS reaches regulation until the LDO
output starts to rise (see Figure 3).
APPLICATIO S I FOR ATIO
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