MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
12 ______________________________________________________________________________________
V.11 and V.35 modes. If the differential receiver input
voltage (B - A) is ≥ -25mV, R_OUT is logic HIGH. If (B -
A) is ≤ -200mV, R_OUT is logic LOW. In the case of a
terminated bus with all transmitters disabled, the
receiver’s differential input voltage is pulled to zero by
the termination. With the receiver thresholds of the
MXL1543, this results in a logic HIGH with a 25mV mini-
mum noise margin.
Applications Information
Capacitor Selection
The capacitors used for the charge pumps, as well as
for supply bypassing, should have a low equivalent
series resistance (ESR) and low temperature coeffi-
cient. Multilayer ceramic capacitors with an X7R dielec-
tric offer the best combination of performance, size,
and cost. The flying capacitors (C1, C2) and the
bypass capacitor (C4) should have a value of 1µF,
while the reservoir capacitors (C3, C5) should have a
minimum value of 4.7µF (Figure 10). To reduce the rip-
ple present on the transmitter outputs, capacitors C3,
C4, and C5 can be increased. The values of C1 and C2
should not be increased.
Cable Termination
The MXL1344A software-selectable resistor network is
designed to be used with the MXL1543. The MXL1344A
multiprotocol termination network provides V.11- and
V.35-compliant termination, while V.28 receiver termina-
tion is internal to the MXL1543. These cable termination
networks provide compatibility with V.11, V.28, and
V.35 protocols. Using the MXL1344A termination net-
works provide the advantage of not having to build
expensive termination networks out of resistors and
relays, manually changing termination modules, or
building custom termination networks
Cable-Selectable Mode
A cable-selectable multiprotocol interface is shown in
Figure 11. The mode control lines M0, M1, and
DCE/DTE are wired to the DB-25 connector. To select
the serial interface mode, the appropriate combination
of M0, M1, and DCE/DTE are grounded within the cable
wiring. The control lines that are not grounded are
pulled high by the internal pullups on the MXL1543.
The serial interface protocol of the MXL1543,
MXL1544/MAX3175, and MXL1344A is selected based
on the cable that is connected to the DB-25 interface.
V.11 Interface
As shown in Figure 12, the V.11 protocol is a fully bal-
anced differential interface. The V.11 driver generates a
minimum of ±2V between nodes A and B when a 100Ω
(min) resistance is presented at the load. The V.11
receiver is sensitive to ±200mV differential signals at
receiver inputs A’ and B’. The V.11 receiver rejects
common-mode signals developed across the cable
(referenced from C to C’) of up to ±7V, allowing for
error-free reception in noisy environments. The receiver
inputs must comply with the impedance curve shown in
Figure 13.
For high-speed data transmission, the V.11 specifica-
tion recommends terminating the cable at the receiver
with a 100Ω resistor. This resistor, although not
required, prevents reflections from corrupting transmit-
ted data. In Figure 14, the MXL1344A is used to termi-
nate the V.11 receiver. Internal to the MXL1344A, S1 is
closed and S2 is open to present a 100Ω minimum dif-
ferential resistance. The MXL1543’s internal V.28 termi-
nation is disabled by opening S3.
V.35 Interface
Figure 15 shows a fully-balanced, differential standard
V.35 interface. The generator and the load must both
present a 100Ω ±10Ω differential impedance and a
150Ω ±15Ω common-mode impedance as shown by
the resistive T networks in Figure 15. The V.35 driver
generates a current output (±11mA, typ) that develops
an output voltage of ±550mV across the generator and
