Figure 18. V.28 Termination and Internal Resistance Networks
load termination networks. The V.35 receiver is sensi-
tive to ±200mV differential signals at receiver inputs A’
and B’. The V.35 receiver rejects common-mode sig-
nals developed across the cable (referenced from C to
C’) of up to ±4V, allowing for error-free reception in
noisy environments.
In Figure 16, the MXL1344A is used to implement the
resistive T network that is needed to properly terminate
the V.35 driver and receiver. Internal to the MXL1344A,
S1 and S2 are closed to connect the T-network resis-
tors to the circuit. The V.28 termination resistor (internal
to the MXL1543) is disabled by opening S3 to avoid
interference with the T-network impedance.
V.28 Interface
The V.28 interface is an unbalanced single-ended inter-
face (Figure 17). The V.28 driver generates a minimum
of ±5V across a 3kΩ load impedance between A’ and
C’. The V.28 receiver has a single-ended input. To aid
in rejecting system noise, the MXL1543’s V.28 receiver
has a typical hysteresis of 0.05V.
Figure 18 shows the MXL1344A’s termination network
disabled by opening S1 and S2. The MXL1543’s inter-
nal 5kΩ V.28 termination is enabled by closing S3.
DTE vs. DCE Operation
Figure 19 shows a DCE or DTE controller-selectable
interface. DCE/DTE (pin 14) switches the port’s mode
of operation. See Table 1.
This application requires only one DB-25 connector,
but separate cables for DCE or DTE signal routing. See
Figure 19 for complete signal routing in DCE and DTE
modes.
Complete Multiprotocol X.21 Interface
A complete DTE-to-DCE interface operating in X.21
mode is shown in Figure 20. The MXL1543 is used to
generate the clock and data signals, and the
