LTC3625/LTC3625-1
10
3625f
operaTion
converter will turn off. Once V
MID
has again risen above
the V
MID(GOOD)
threshold, the boost converter will be
re-enabled. In the case where V
OUT
< V
MID
, the boost
converter will operate in trickle charge mode until V
OUT
exceeds V
MID
(see Boost Converter).
3. During phase 2, if C
BOT
exceeds its individual maximum
threshold voltage (2.45V/2.05V typical if V
SEL
is low
or 2.7V/2.3V typical if V
SEL
is high) or if V
TOP
exceeds
V
BOT
by more than 50mV (typical), then the appropri-
ate converter will turn off until the capacitor has fallen
below its hysteresis threshold (2.40V/2V typical if V
SEL
is low and 2.65V/2.25V typical if V
SEL
is high for the
buck converter or V
TOP
< V
MID
50mV typical for the
boost converter).
4. Once V
OUT
has reached its programmed output voltage,
the part will enter sleep mode, and only minimal power
will be consumed (see the Electrical Characteristics
table).
5. If the supercapacitors’ self discharge or an external load
cause the output to drop by more than 135mV (typical),
then the LTC3625/LTC3625-1 will exit sleep mode and
begin recharging the supercapacitor stack.
In all cases, whenever either of the converters is shut
down, it will switch to its appropriate discharge phase
(NMOS on for the buck and PMOS on for the boost) until
the inductor current reaches 0mA. This optimizes charge
delivery to the output capacitors.
Charge time is dependent on the programmed buck out-
put current as well as the value of supercapacitors being
charged. For estimating charge profiles in the dual inductor
application, see the Typical Performance Characteristics
graph Charge Time vs R
PROG
.
The effective average V
OUT
referred charge current, while
both converters are continuously active, can be approxi-
mated as:
I I A
V
V
CHARGE BUCK BOOST
MID
OUT
0 5 1 1 2. ε
And, while both supercapacitors are in balance and V
MID
is above the V
MID(GOOD)
threshold as:
I
CHARGE
0.5 • I
BUCK
ε
BOOST
where ε
BOOST
is the boost converter efficiency which is
typically around 85% (see the Typical Performance Char-
acteristics graph Boost Efficiency vs V
TOP
).
Seen another way this is the maximum steady-state load
the part can support without losing V
OUT
regulation.
PGOOD PIN
The PGOOD pin is an open-drain output used to indicate
that V
OUT
has approached its final regulation value. PGOOD
remains active low until V
OUT
reaches 92.5% of its regula-
tion value at which point it will become high impedance.
If V
OUT
falls below 89.5% of its regulation voltage after
PGOOD has been asserted, PGOOD will once again pull
active low. PGOOD is an open-drain output and requires
a pull-up resistor to the input voltage of the monitoring
microprocessor or another appropriate power source.
PGOOD is pulled active low in shutdown or input UVLO.
Power-Fail Input Comparator
The PFI/PFO pins provide an input failure notification to
the user. The PFI pin is a high impedance input pin that
should be tied to a resistive divider from V
IN
. PFO is an
open-drain output and requires a pull-up resistor to the
input voltage of the monitoring microprocessor or another
appropriate power source. When PFI is above 1.2V, PFO is
high impedance and will be pulled up through the external
resistor. If PFI drops below 1.2V, PFO will be pulled low
indicating a power failure. This allows the user to program
any desired input power failure indication threshold. There
is 15mV of hysteresis on the PFI pin. If this functionality
is not desired the PFI pin should be tied to V
IN
. PFO is
pulled active low in shutdown or input UVLO
Shutdown Operation
When the EN pin is pulled low the LTC3625/LTC3625-1 are
put into shutdown. In this case, all of the active circuitry is
powered down and there will be less than 1µA of leakage
current from both V
IN
and V
OUT
. This allows the input to
be present or absent as well as the capacitor stacks to be
fully charged or discharged in shutdown without leakage
between V
IN
, V
OUT
and GND.
LTC3625/LTC3625-1
11
3625f
applicaTions inForMaTion
Programming Charge Current/Maximum Input Current
The C
BOT
charge current is programmed with a single
resistor connecting the PROG pin to ground. The program
resistor and buck output current are calculated using the
following equation:
R h
V
I
PROG PROG
BUCK
=
.1 2
where h
PROG
= 118,000 (typical). Excluding quiescent cur-
rent, I
BUCK
is always greater than the average buck input
current. An R
PROG
resistor value of less than 53.6k will
cause the LTC3625/LTC3625-1 to enter overcurrent protec-
tion mode and proceed to charge at 2.65A (typical).
The effective buck input current can be calculated as:
I
I
V
V
VIN
BUCK
BUCK
MID
IN
=
ε
where ε
BUCK
is the buck converter efficiency (see the
Typical Performance Characteristics graph Buck Efficiency
vs V
MID
).
Output Voltage Programming
The LTC3625/LTC3625-1 have a V
SEL
input pin that
allows the user to set the output threshold voltage to
either 4.8V/4.0V or 5.3V/4.5V by forcing a low or high at
the V
SEL
pin respectively. In the single inductor application
the chip will balance the supercapacitors to within 50mV
(typical) of each other, resulting in a possible 25mV of
over/undercharge per cell. In the dual inductor application
the chip will balance the supercapacitors to within 100mV
(typical) of each other, resulting in a possible 50mV of
over/undercharge per cell.
Thermal Management
If the junction temperature increases above approximately
150°C, the thermal shutdown circuitry automatically de-
activates the output. To reduce the maximum junction
temperature, a good thermal connection to the PC board
is recommended. Connecting the exposed pad (Pin 13) of
the DFN package to a ground plane under the device on two
layers of the PC board, will reduce the thermal resistance
of the package and PC board considerably.
V
IN
Capacitor Selection
The style and value of capacitors used with the LTC3625/
LTC3625-1 determine input voltage ripple. Because the
LTC3625/LTC3625-1 use a step-down switching power sup-
ply from V
IN
to V
MID
, its input current waveform contains
high frequency components. It is strongly recommended
that a low equivalent series resistance (ESR) multilayer
ceramic capacitor be used to bypass V
IN
.
Tantalum and aluminum capacitors are not recommended
because of their high ESR. The value of the capacitor on
V
IN
directly controls the amount of input ripple for a given
I
BUCK
. Increasing the size of this capacitor will reduce the
input ripple.
Multilayer ceramic chip capacitors typically have excep-
tional ESR performance. MLCCs combined with a tight
board layout and an unbroken ground plane will yield
very good performance and low EMI emissions. There are
several types of ceramic capacitors available, each having
considerably different characteristics. For example, X7R
ceramic capacitors have the best voltage and temperature
stability. X5R ceramic capacitors have higher packing
density but poorer performance over their rated voltage
and temperature ranges. Y5V ceramic capacitors have
the highest packing density, but must be used with cau-
tion because of their extreme non-linear characteristic of
capacitance verse voltage.
The actual in-circuit capacitance of a ceramic capacitor
should be measured with a small AC signal as is expected
in-circuit. Many vendors specify the capacitance versus
voltage with a 1V
RMS
AC test signal and as a result,
overstate the capacitance that the capacitor will present
in the application. Using similar operating conditions as
the application, the user must measure or request from
the vendor the actual capacitance to determine if the
selected capacitor meets the minimum capacitance that
the application requires.
Inductor Selection
Many different sizes and shapes of inductors are avail-
able from numerous manufacturers. Choosing the right
inductor from such a large selection of devices can be
overwhelming, but following a few basic guidelines will
make the selection process much simpler.
LTC3625/LTC3625-1
12
3625f
applicaTions inForMaTion
The buck and boost converters are designed to work with
inductors over a wide range of inductances. Choosing a
higher valued inductor will decrease operating frequen-
cies, while a lower valued inductor will increase frequency
but also increase peak current overshoot/undershoot. For
most applications a 3.3µH inductor is recommended. To
maximize efficiency, choose an inductor with a low DC
resistance. Choose an inductor with a DC current rating
at least as large as the maximum I
PEAK
the application will
see according to the specifications table to ensure that the
inductor does not saturate during normal operation. If the
single inductor application is used, make sure to size the
inductor for the higher of buck or boost peak currents.
Different core materials and shapes will change the size/cur-
rent and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or Permalloy materials
are small and do not radiate much energy, but generally
cost more than powdered iron core inductors with similar
electrical characteristics. Inductors that are very thin or
have a very small volume typically have much higher core
and DCR losses, and will not give the best efficiency. The
choice of which style inductor to use often depends more
on the price versus size, performance and any radiated
EMI requirements than on what the LTC3625/LTC3625-1
family requires to operate.
Table 2 shows several inductors that work well with the
LTC3625/LTC3625-1 regulators. These inductors offer a
good compromise in current rating, DCR and physical
size. Consult each manufacturer for detailed information
on their entire selection of inductors.
Supercapacitor Selection
The LTC3625/LTC3625-1 are designed to charge super-
capacitors of values greater than 0.1F per cell. In general,
lower capacitance cells have higher ESRs, therefore lower
charge currents should be used to help reduce sleep
modulation towards the end of a charge cycle. In general,
the ESR of a supercapacitor cell should not exceed:
ESR
mV
I
BUCK
100
where 100mV is the sleep threshold hysteresis. Higher
capacitance cells typically have lower ESRs and can
therefore be charged with higher currents. Typically, the
LTC3625/LTC3625-1 are designed to charge supercapaci-
tors with values up to 100F, but higher capacitance cells
could be used at the expense of greater charge time.
T
able
3 shows several supercapacitors that work well with
the LTC3625/LTC3625-1.
Printed Circuit Board Layout Considerations
In order to be able to deliver maximum current under all
conditions, it is critical that the exposed pad on the backside
of the LTC3625/LTC3625-1 package be soldered to the PC
Table 2. Inductor Manufacturers
MANUFACTURER PART NUMBER INDUCTANCE (µH) CURRENT (A) DCR (mΩ) SIZE (mm)
Coiltronics DR73-3R3-R 3.3 3.0 20
7 × 7
Coilcraft MSS7341-332NL 3.3 3.2 20
7 × 7
Vishay IHLM2525CZER3R3M11 3.3 6.5 26
6.5 × 6.9
Sumida CDRH6D28P-3RON 3.0 3.0 24
7 × 7
TOKO B1077AS-3RON 3.0 3.3 30
7.6 × 7.6
Table 3. Supercapacitor Manufacturers
MANUFACTURER PART NUMBER VALUE (F) OPERATING VOLTAGE (V) MAXIMUM ESR (mΩ) SIZE (mm)
Cooper Bussmann B1860-2R5107-R 100 2.5 20
18 × 60
Illinois Capacitor 107DCN2R7M 100 2.7 10
22 × 45
NESS Capacitor ESHSR-0100C0002R7 100 2.7 9
22 × 45
Tecate TPLS-100//22 X 45F 100 2.7 9
22 × 45
Maxwell BCAP120P250 120 2.5 2.5
26 × 51

LTC3625IDE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management 1A High Efficiency 2-Cell SuperCap Charger with Programmable Charge Current
Lifecycle:
New from this manufacturer.
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